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1201 SoCs

1
10 Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
The Arasan Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3- 2008 standard. The Gigabit Ethernet IP provides a 10/100 Mbps Media Independent Interface (MII) and a...

2
10G PHY for PCIe 3.0 in TSMC (16nm) for Automotive

The multi-lane DesignWare Multi-Protocol 10G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for low-power consumption and low latency i...


3
10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications
Configurable MAC solutions for speeds from 10Gbps to 10Mbps

4
128-bit vector word length ARC VPX2 DSP IP
DesignWare® ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on devices to automotive ADAS to communications and high-performa...

5
24 Ghz / 77 Ghz Automotive Radar Transceivers IP
Driver assistance systems use radar sensors in various counts and configurations. The data provided by the radar sensors is used in applications such as blind-spot detection, autonomous emergency brak...

6
256-bit vector word length, dual-core ARC VPX3 DSP IP with integrated hardware safety features for automotive
The DesignWare ARC VPX5 DSP processor IP is a member of the VPX VLIW/ SIMD DSP family for high-end computation applications. The VPX5 processor is designed for high-performance automotive ADAS applica...

7
3DES-ECB 1 Billion trace DPA resistant cryptographic accelerator core
Rambus Crypto Accelerator 3DES-ECB Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consumpti...

8
512-bit dual-core vector DSP IP

The DesignWare ARC VPX5 DSP processor IP is a member of the VPX VLIW/ SIMD DSP family for high-end computation applications. The VPX5 processor is designed for high-performance automotive ADAS appl...


9
ACS-AIP-DPHY-40GF-Auto - MIPI D-PHY in GlobalFoundries 40nm Automotive Process
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete GDSII that includes analog BIST and routing to your pads.

10
ACS-AIP-DPHY-40LP-RA - MIPI D-PHY TSMC 40LP Renesas- Automotive Grade
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete GDSII that includes analog BIST and routing to your pads.

11
Active mesh against tampering attacks - Active Shield
Attacks against digital circuits can be performed by directly tampering with the device s internal structure. These attacks are intrusive, and regroup attempts to directly probe or force signals, remo...

12
AES (ECB), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores
Rambus Crypto Accelerator AES-AE-Fast Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consum...

13
AES (ECB-CBC-CFB-CTR), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores
Rambus DPA Resistant AES-FBC Cryptographic Accelerator Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the powe...

14
AES CCM/GCM Engine
The EIP-39 AES Accelerators implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O reg...

15
AES Engine
The EIP-36 AES Engines implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O register...

16
AES GCM/XTS Engine
The EIP-38 - AES/GCM/XTS/LRW Engines are specifically suited for next generation processors deployed in networking and storage appliances that need to support combinations of AES (with its regular fee...

17
AES Key Wrap Engine
The EIP-37 is the IP for accelerating the AES Key Wrap cipher algorithm (NIST-Key-Wrap & RFC3394). Designed for fast integration, low gate count and full transforms, the EP-37 accelerator provides a r...

18
AES-GCM Ultra-Low Latency
The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm compliant with the NIST SP 800-38D standard. The unique architecture ena...

19
Anti Row-Hammer / Memory Attacks
The Anti Row-Hammer IP takes part in Memory Controller in order to protect the Memory against Rowhammer Attacks, especially on RAM. This IP is able to determine if the number of access requests to a M...

20
Arasan Chip Systems - SoC Design Services
Arasan Chip Systems is a leading provider of Total IP solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven Total IP Solutions include Digital IP Cor...

21
ARC AS200 Audio Family - Efficient Single/Dual Core Audio Processors, Optimized Codecs

Synopsys offers an extensive portfolio of audio codecs that are available for use with the DesignWare® ARC® EMxD and the ARC HS4x families of processors. The ARC audio codecs facilitate a range of...


22
ARC EM22FS safety processor
The DesignWare® ARC® EM22FS Safety Processor simplifies development of safety-critical applications and accelerates ISO 26262 certification of automotive system-on-chips (SoCs).

23
ARC EV Processors are fully programmable and configurable IP cores that are optimized for embedded vision applications

DesignWare EV Embedded Vision Processors provide high-performance processing capabilities at a power and cost point low enough for embedded applications, while maintaining flexibility to support an...


24
ARC EV Processors are fully programmable and configurable IP cores that are optimized for embedded vision applications

DesignWare EV Embedded Vision Processors provide high-performance processing capabilities at a power and cost point low enough for embedded applications, while maintaining flexibility to support an...


25
ARC HS46FS, HS47DFS, and HS48FS Functional Safety Processors

The Synopsys ARC® HS46FS, HS46FSx4, HS47DFS, HS47DFSx4, HS48FS, and HS48FSx4 functional safety Processors simplify development of high-performance safety-critical applications and accelerate IS...


26
ARC HS47D with ASIL-B and ASIL-D support including dual-core lockstep for automotive functional safety applications
The DesignWare ARC HS46FS, HS46FSx4, HS47DFS, HS47DFSx4, HS48FS, and HS48FSx4 functional safety processors simplify development of high-performance safety-critical applications and accelerates ISO 262...

27
ARC HS48 quad-core processor with ASIL-B/ASIL-D support for functional safety applications
The DesignWare® ARC® HS46FS, HS46FSx4, HS47DFS, HS47DFSx4, HS48FS, and HS48FSx4 functional safety processors simplify development of highperformance safety-critical applications and accelerates ISO 26...

28
ARC Processors for Audio

The DSP-enhanced Synopsys ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Architecture (ISA). The DSP-enhanced ARC processor famili...


29
ARC VPXxFS DSP Processor for Automotive

The ASIL B, C and D compliant Synopsys ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) designers to accelerate advanced driver assistance systems...


30
ARC4 Engine
The EIP-44 is the IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec).

31
ARIA Crypto Engine
The ARIA crypto engine includes a generic implementation of the ARIA algorithm which is the block cipher standard of South Korea.

32
ARIA Engine
The EIP-11 ARIA algorithm, as specified in RFC 5794. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling and GHASH. Besides the...

33
Arm Artisan IoT POP IP
Arm IoT POP IP helps accelerate the implementation of IoT SoCs by offering physical IP as well as reference designs and know-how to develop a design that has optimal performance with minimum area.

34
Arm Allinea Studio
High Performance Tools for Developing Arm Based HPC Solutions

35
Arm CoreLink DMA-350
The Arm CoreLink DMA-350 direct memory access (DMA) controller offloads memory movement tasks from the CPU to improve system performance and energy-efficiency. It includes support for scatter gather, ...

36
Arm CoreLink SSE - 200 subsystem
The CoreLink SSE-200 subsystem is the foundation on which SoC designers will build a new generation of secure IoT products.

37
Arm Cortex-A78AE
Highest Performance CPU with Split-Lock

38
Arm Cortex-R5
The Arm Cortex-R5 processor forms a simple migration path from the Cortex-R4 processor, and onwards to the higher performance Cortex-R8 and Cortex-R52 processors. The Cortex-R5 processor builds on the...

39
Arm CORTEX-R52+
Real-Time Virtualization Support for Functional Safety

40
Arm Design Support and Training

The Help You Need for a Future Built on Arm

Arm offers a range of expert support and training services, along with bespoke Professional Services, to help you reduce design ri...


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