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Overview

The logiLMD Lane Marking Detection IP core from Xylon s logicBRICKS IP core library is designed to detect the lane markings on the roadway video scenarios captured from a rear-view camera, and to raise an alert in case the host s vehicle departs from the lane. Its functions include image-processing filters, like Gaussian smoothing and Edge detection, and blocks specifically tailored for lane marking detections. The output of the core is the set of straight lines corresponding to lane markings.

Block Diagram

Tech Specs

Market SegmentAutomotive

Features

  • Fundamental building block for FPGA based automotive Rear Looking Lane Departure Warning System
  • Supports Xilinx®Spartan®-6 FPGA
  • ARM® AMBA® AXI4 bus compliant
  • Adapts to shadows and light changes
  • Hough Transform based model fitting
  • Implements the most computing demanding tasks in programmable logic
  • High Input Data Rate; > 180 Mpixel/sec
  • Provides high level decision making reasoning as open source embedded software
  • Fully embedded into Xilinx XPS and the EDK

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