www.design-reuse-embedded.com

Xtensa LX7 Processor
Request More Info
 

General Description

Overview
Cadence provides system-on-chip (SoC) designers with the world's first configurable and extensible processor, fully supported by automatic hardware and software generation. Cadence® Tensilica® Xtensa® processors enable SoC designers to add performance, flexibility, and longevity to their designs through software programmability, as well as differentiation through processor implementations tailored for their specific application. Xtensa LX7 processors and digital signal processors (DSPs) can be configured and customized to cover a vast array of SoC functions, including embedded controllers, powerful audio, communications, and vision DSPs, and specialized custom cores for security and network processing.

Benefits
  • Easily create programmable DSPs for complex
    data processing
  • Simple options to build a real-time control processor
  • Achieve high-bandwidth processing with independent flexible I/O interfaces
  • Add parallelism to reduce cycle counts and power
  • Lower verification effort with pre-verified, correct-by-construction RTL generation
  • Accurate processor and system simulation models created automatically
  • Achieve low-leakage power and dynamic power savings
  • Easy integration into an CoreSight debug and trace infrastructure
  • Mature, highly optimized C/C++ compiler for
    easy programming
  • Xtensa Xplorer IDE is based on the familiar Eclipse framework

Technical Details

Key Features
  • Extended portfolio of DSP ISA options:
    • Tensilica Vision P6 DSP for imaging and convolutional neural network (CNN) processing
    • Tensilica Fusion G3 DSP for multi-purpose, fixed, and floating-point DSP applications
  • Single-precision vector floating-point (VFPU) option for the Tensilica ConnX BBE-EP DSPs for baseband applications
  • Enhanced AXI4 bus interface with protocol support for ACE-Lite, Exclusive Access, Security, and ECC
  • Low-latency Integrated DMA (iDMA) controller option
  • Scatter-gather feature available on select Vision DSPs for improving non-uniform simultaneous memory accesses algorithms
  • Enhanced Functional Safety features and documentation to support ISO 26262 compliance
  • Fine-grained programmable memory protection unit (MPU)
  • Xtensa Processor Generator (XPG) Tool - Version 12.04
  • Xtensa Xplorer Integrated Developer Environment (IDE) Tool - Version 7.04

Block Diagram

Documentation

Datasheet
Datasheet

Related Products

Partner with us

Visit our new Partnership Portal for more information.

Submit your material

Submit hot news, product or article.

List your Products

Suppliers, list and add your products for free.

© 2016 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted,
reposted, duplicated or otherwise used without the
express written permission of Design And Reuse.