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All Silicon IP


PLDA Gen4SWITCH is a complete development platform based on PLDA s PCIe compliant XpressSWITCH IP and PLDA s XpressRICH4? controller IP for PCIe 4.0 technology running on a Xilinx Virtex UltraScale FPGA. This new product provides the first PCIe 3.0 x8 (upstream) to PCIe 4.0 x4 (downstream) Integration Backplane. By working with the PLDA Gen4SWITCH, early developers of PCIe 4.0 technology can be among the first to test PCIe 4.0 architecture for Endpoint/PHY/boards with their own software, designs and boards in a real system.


  • Exclusivity: PCIe Gen3-X8 to Gen4-X4 switch Platform allowing Gen4-X1/Gen4- X4 Endpoint testing in real system environment
  • 20+ years of experience in design of IP cores for ASIC with specialization in high-speed interface protocols and technologies, more than 6200 customers , including several hundred of ASIC tape-outs.
  • No Specific Gen4 environment is necessary, Gen4SWITCH only requires a Gen3- X16 Mechanical (Gen3- X8 electrical) rootport interface from any Gen3 capable computer
  • Ready to use: no Gen4 driver is required, no programming is necessary
  • Easy DUT integration on Gen4SWITCH Backplane
  • Gen4 peer-to-peer transfers using PLDA PCIe 4.0 embedded EndPoint

Block Diagram


  • Gen4SWITCH is based on a Xilinx Virtex UltraScale XCVU065-2FFVC1517E FPGA and features:
    • One PCIe Gen3-X8 electrical Upstream (on a Gen3-X16 mechanical connector)
    • One PCIe Gen4-X4 electrical Downstream (on a Gen4-X16 mechanical rootport
  • Gen4SWITCH FPGA is configured with PLDA XpressSwitch IP, featuring:
    • 1 Gen3 x8 US port connected to Gen3 capable computer
    • 1 Gen4 x4 DS port connected to external DUT
    • 1 Gen4 x4 DS port connected to PLDA PCIe 4.0 IP as Gen4 x4 embedded EP
  • Gen4 DUT is connected to Gen4SWITCH via Samtec FIREFlY optical fibers


  • Ready to use Gen4SWITCH Platform
  • Documentation and user s guide
  • Technical support and maintenance updates

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