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The QuickPlay development platform provides the software and hardware infrastructure that enable tight integration between design IP, FPGA hardware, application software and design software, allowing developers to build FPGA enabled applications in record time. To facilitate adoption and enable a strong ecosystem of IP vendors, board vendors, and service providers, QuickPlay was engineered as an open platform that leverages industry standards: C/C++ and HDL for kernel design, AXI4 as the interconnect architecture, YAML, IP-XACT as the component/board description formats and Python as the scripting language.


QuickPlay is a revolutionary new design platform that enables streamlined design of FPGA based applications, even for designers with little to no FPGA experience. QuickPlay, a PLDA GROUP innovation, embodies a pervasive vision that FPGA computing should be as approachable as ubiquitous CPU computing and is the result of years of research in the field of High-Level Design (HLD) and High-Level Synthesis (HLS).


  • A model-based graphical and C/C++ FPGA design front-end allowing developers to focus on data flow and data processing
  • An intelligent interconnect infrastructure that abstracts hardware communication channels through an un-typed, un-timed C++ API
  • A board-aware environment that guarantees hardware functionality and timing closure
  • A technology-agnostic and open architecture allowing mix-match of HDL and C/C++ IP from various sources
  • An integrated design flow that leverages cloud computing for rapid and seamless FPGA implementation

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