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The DesignWare IP Prototyping Kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort and to enable designers to start implementing IP in an SoC in minutes. The kits center around a complete, out-of-the-box reference design that consists of a validated IP configuration and necessary SoC integration logic such as clock, reset, power management, and test logic for a specific IP protocol, implemented on Synopsys HAPS-DX FPGA-based prototyping system. The IP Prototyping Kits also include a DesignWare ARC processor-based 32-bit software development platform running Linux, reference drivers and application examples. With a proven reference design for the IP, designers can be instantly productive, enabling them to accelerate the integration of IP into their target SoC, optimize the IP configuration, and develop drivers and software applications with real world I/Os and hardware. Designers can modify the standard IP configuration for their target application through a fast iteration flow consisting of Synopsys coreConsultant IP configuration tool, Synopsys ProtoCompiler DX synthesis and debug tool, and compilation scripts. For hardware engineers, the IP Prototyping Kits provide a validated IP configuration that can be easily modified to explore design tradeoffs for the target application. For software developers, the IP Prototyping Kits can be used as proven targets for early software bring-up, debug, and test.


  • Synopsys HAPS-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic
  • PHY daughter board
  • Simulation testbench
  • DesignWare ARC-based software development platform running Linux
  • Reference drivers
  • Application examples

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