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Overview

EFLX-100 in TSMC 16FF+/FFC enables programmable networking chips with wide, reconfigurable logic from 100 to 2500 LUTs running about 1GHz (exact speed depends on the RTL and the voltage range). EFLX-100 is available now for TSMC 16FF+/FFC. EFLX-2.5K will be available in early 2017 for TSMC 16FF+/FFC.

Block Diagram

Features

The EFLX-100 core in TSMC 16FF+/FFC has been enhanced to provide higher performance for the wide logic cones of network control logic:
  • 96 each of 6-input LUTs (also useable as dual 5-input LUTs): wider LUTs mean wide logic cones can be handled in fewer stages meaning higher performance and higher density
  • 224 inputs and 224 output: more inputs means wider logic paths can be handled in fewer EFLX-100 cores
All voltage ranges are supported for 16FF+ and 16FFC over the full -40 to 125C temperature range. A single EFLX-100 core is 0.05 mm2 in size. The EFLX-100 core tiles in ~25 array sizes from 100 to 2,500 LUTs. TRY OUT YOUR RTL: get a software evaluation license for the EFLX Compiler with worst-case timing files for EFLX-100 in TSMC 16FF+/FFC to see how your RTL performs and how many LUTs it uses. Email info@flex-logix.com to arrange your license.

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