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SPC (Synthesizable Programmable Core) is a soft FPGA core that is fully integrated into standard design flows and that allows the seamless implementation of generic RTL programmable logic in ASICs and SOCs.

The IP contains three modules:

  • A Look Up Table (LUT) based programmable core, or FPGA, suitable for mapping generic RTL functions
  • A configuration controller for the interaction between SOC and FPGA system functions such as the loading/checking of the bitstream.
  • A Built-In Self-Test for industrial grade manufacturing testing or in-system self-testing.

Block Diagram


Configuration Control interface. On the fly bitstream decompression and decryption. High granularity partial reconfiguration.

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