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The iniDSP is designed for system-on-chip applications. A highest degree of reusability is guaranteed by having a 100% technology independent design, synchronous and structured design rules and software support. This core is based on the architecture of the CD2450A from Clarkspur Inc. INICORE is official licensee of this technology and has developed a structured high level model. Optimized and enhanced for high performance, lowest power and efficient algorithm programming, the iniDSP is an alternative to off-chip DSPs and existing technology dependent solutions.


The wide application range goes from lowest power solutions like hearing aids, signal conditioning in sensors, over mid range audio applications (compression) to powerful control circuits.

Block Diagram


  • 16 bit fixed point customizable DSP
  • Single cycle 16 bit signed/unsigned multiplier
  • 1 or more 40bit accumulator(s)
  • 64k X data, Y data and program memory range
  • Supports pseudo floating point arithmetic
  • 32bit barrel shifter
  • Low latency interrupts and sleep mode
  • Powerful built-in hardware debugger
  • C-compiler, assembler, linker and debugger
  • Straight forward system embedding
  • Fully synchronous, technology independent
  • VHDL model for synthesis and simulation
  • Open and customizable architecture, instruction plug-in: iniDSP is fast where you need the power!
  • Lowest Power Consumption: < 100uA / MIPS
  • 80MIPS on 0.18 micron ASIC proven
  • Evaluation platform available (FPGA and ASIC)

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