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IoT Subsystem with AXI Multi-layer AHB Multi-matrix Bus System

SoC Solutions, LLC

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For designs requiring high performance with multiple data channels and perhaps multi-processing, we can build your subsystem around the Cortex processor. Our AXI multi-layer bus can be configured for many masters such as DMA, complex DDR2/3 memory controllers, custom caches, AXI to AHB mult-matrix bridges, AXI to APB peripherals.


  • Customizable to meet power and performance needs
  • Integration and Software support
  • Cost effective
  • Subsystem upon which to add your IP.


Typical applications include image processing, video streaming, medical devices, multi-port wireless routers and large display devices.


  • Custom Performance
  • Supports Cortex-A5 (or equivalent) processor
  • AMBA 4.0(AXI)
  • AXI Multi-layer bus infrastructure
  • External Nor Flash controller
  • DMA (single or multi-channel)
  • DDR2/3 support (3rd party IP)
  • Internal SRAM controller(s)
  • Interrupt Controller (optional)
  • QSPI with Execute in Place (XIP) for standard Flash parts such as Winbond and Spansion
  • AXI/APB bridge
  • Standard APB Peripheral package
  • I2C, SPI, UART, GPIO, Timers, Watchdog
  • AXI-AHBLite bridge (optional)


  • Verilog Source
  • System level SOC test environment
  • Simulation and synthesis scripts
  • C-Code tests

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