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Overview

The SOCC-1110 is an 8051 based configurable SoC platform. The platform contains an 8051 CPU core, and all the peripheral functions required for a basic SoC. The SOCC-1110 contains a single cycle 8051 CPU core plus standard set of SoC peripherals, including a system timer, a watchdog timer, an interrupt controller, programmable I/O, I2C Host, SPI master, real-time clock, alphanumeric LCD interface, 16550 UART and serial port. A memory controller supporting SRAM, Serial Flash, and Serial EERPROM also be optionally instantiated. The user also has the option to select from a library of cores and subsystems that have been pre-integrated and verified to work in this platform, including a DMA controller, 16450 UART, IDE Host, SATA Host and SATA Device interface. Also, 3rd party IP cores like JPEG decoders, TCP/IP hardware accelerators and Ethernet MACs can be easily integrated into this platform. Many applications can be supported by this configurable platform including Home Area Networks (HAN), Smart Grid, Zigbee, wireless sensor networks, USB Flash Drives, USB IDE/SATA Drives, Web servers, Smart Card, Photo Frames etc.

Benefits

  • Accelerate design-cycle by reducing development time
    • Allows customers to focus on developing their value-add blocks
  • Multiple peripherals available in addition to base platform to target following applications:
    • Home Area Networks (HAN)
    • Smart grid
    • Zigbee
    • Wireless sensor networks
    • USB Flash drives
    • USB IDE/SATA drives
    • Web servers
    • Smart card
    • Photo frames, etc.
  • Easy to integrate 3rd party IP
  • Robust verification platform/deliverables
  • Silicon proven IP
  • Additional Customization options
    • New IP development and integration
    • Application software and firmware development

Features

  • 8051 single cycle CPU core
  • Standard peripheral functions
    • Programmable I/O
    • 16450/16550 compatible UART functions
    • Interrupt controller
    • General purpose timer
    • Watchdog timer
    • Power management
    • Real-time clock
    • I2C master
    • SPI master
    • Alphanumeric LCD controller
  • Optional component available
    • DMA controller
    • Memory controller for SRAM/Flash/EEPROM
    • MMC
  • Other 3rd party IP blocks can easily be integrated

Deliverables

  • Verilog RTL code
  • Synthesis/STA scripts
  • Comprehensive documentation
    • Datasheet
    • User Manual
    • Memory-mapped register manual
    • DV plan
    • Release notes
  • Verification deliverables
    • Assembly language test suites for CPU verification
    • Assembly language test suites for peripheral/platform verification
    • C test suites to verify peripherals/platforms
    • Customized scripts to compile programs and load memories as required
    • Verilog BFM/test suites for platform verification
    • Same test suites run at module-level or platform-level
    • Includes simulation models for all peripherals
    • Supports C, Verilog, assembly language based verification
  • Supports HW/SW co-verification
    • Compiler, simulator and MON51 support in Keil
  • Support for FPGA-based emulation
  • Benchmark tests
    • Sieve
    • Dhrystone v1.1, v2.1
    • Whetstone
  • Operating systems ported to platform
    • TinyOS
    • Contiki OS

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