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Overview

SonicsGN (SGN) is Sonics 4th generation, configurable, on-chip network enabling the design of advanced SoC communications networks using a high-speed scalable fabric topology structure. As the industry s highest frequency NoC available today, SGN allows SoC designers to deliver high-performance, simultaneous application processing for smart phones, mobile video and tablets. SGN s configurable IP, intuitive user interface, and robust verification environment provide all the tools necessary to create speedy, robust, gate-efficient on-chip communications networks for advanced SoC designs. SGN provides a high-performance network for the transportation of packetized data, utilizing routers as the fundamental switching elements. Routers allow for pipelining and buffering, enabling designers to tailor these elements to their exact requirements for area and frequency. SGNs routed, packetized architecture can easily be combined with other Sonics connectivity components allowing the SoC designer unlimited flexibility when designing complex connectivity solutions for advanced SoC devices. This flexibility ensures the lowest area, highest wiring efficiency, and highest performance networks. In addition, SGN offers designers a variety of rich features which enable the customization and streamlining of advanced fabric generation. These features include, rich partitioning support, AXI and OCP native protocol support, concurrency, robust Quality of Service, advanced address mapping, power management capabilities, and floor plan topology optimization. These are just some of the features that make SGN the clear choice for advanced on-chip network design. SGN is configured using Sonics advanced development environment: Sonics StudioXE. The SGN Front-End Design Tool provides a precise methodology and workflow to assist the architects and designers in the creation, optimization, and verification of the on-chip network.

Benefits

  • GHz frequencies for today s advanced SoC designs
    • GHz product frequencies support the demanding needs of high performance multi-core processors and DDR3 memories
  • Advanced Concurrency
    • Virtual channels allow optimal data flow through the network, efficiently utilizing logic and wiring resources
    • Non-blocking flow control
    • Quality-of-Service
  • Eases system partitioning for SoCs with multiple domains
    • Integrated tools for managing multiple complex power, voltage, and clocking domains globally and within local subsystems
    • Easy design flow and timing closure
  • Reduces wiring congestion
    • Serialized, virtual channel based, packetized fabric reduces wiring area
  • Native AMBA interfaces
    • Socket support for AXI3/AXI4
    • Efficient interfaces to popular AMBA cores yields no loss of performance or area for protocol conversion
  • Ensures best performance for latency-sensitive cores
  • Seamlessly integrates with low-latency subsystems for optimal SoC performance

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