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All Silicon IP

Overview

The purpose of inter-chip connectivity IP is to connect two different chips together to share computing resources, limit chip-to-chip latency, or maintain the highest possible chip-to-chip bandwidth. Inter-chip connectivity is also often described as chip-to-chip, die-to-die or C2C links. Chip to Chip Link (C2C) Arteris offers the C2C Chip to Chip Link product and is also a contributor to the MIPI Low Latency Interface (MIPI LLI) specification. Chip to Chip Link (also known as C2C) offers the capability to connect two chips without a PHY, using only DDR pads. C2C is a trademark of Texas Instruments, Inc., and is a product containing TI and Arteris technology. C2C for Mobile Phones C2C's primary purpose is to connect a mobile phone applications processor to a mobile phone modem. The 100ns round-trip latency of the C2C connection is fast enough for the modem to share the application processor's RAM and to maintain enough read throughput for cache refills. This enables the phone manufacturer to remove the modem's dedicated RAM chip from the phone's bill of materials (BOM).

Benefits

BoM Cost Savings ~$1.50 256Mb LPDDR1 ~$2.00 512Mb LPDDR2 (cost estimates for 2011) PCB Area Savings 72 mm2 (8x9mm) for LPDDR1 115 mm2 (10x11.5mm) for LPDDR2

Tech Specs

Market SegmentNetworking

Features

  • C2C Latency 100 ns round-trip
  • C2C Connectivity DDR pads
  • Transmit Pads required 16 or 8
  • Receive Pads required
  • 16 or 8

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