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Overview

  • Software plays a very critical role in the SoC development and the design teams now spend more time writing software than building hardware.
  • In a traditional flow to system development; first hardware is designed, second Software is developed and then hardware and software is integrated.
    • As major work is Software development, this approach causes critical loss of time which effects Time-to-Market of the final product.
  • Virtual Prototype(VP) is concept in which the Software team need not wait for the actual Hardware (RTL/Silicon) to be ready.
  • The Hardware will be modelled as a Software component using SystemC language
    • VP is a key component of our delivery and the Software team can begin porting operating systems and developing device drivers, by integrating our VP models when the RTL is not ready.
    • This saves the overall SOC/System development time and makes the SW-HW integration easier, bug free
  • Block Diagram

    Features

    Huge Time to Market benefit: Hardware is built as a Software component which helps in reducing the product development time by parallelizing the Software and Hardware development for the End Customers.
    • Enhance Collaboration: Provide an early abstract functional model of the hardware to software engineers even before the hardware design is available. Software teams can start developing code and this enhances collaboration between the HW and SW teams.
    • Early bug closure: Don t have to wait for the System Design bugs to be caught at the last stage of the Hardware design. This saves cost, time and effort.
    • Flexible Architecture: By performing early integration of the software with the hardware, various architectural choices can be taken in both software and hardware worlds, so as to optimize the system performance, power consumption.

    Deliverables

    • SystemC / TLM 2.0 model
    • OCP-IP interface
    • Either IPXACT or GREENREG or others register modeling libraries
    • QEMU or OVP model based virtual platform integration

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