www.design-reuse-embedded.com
Find Top SoC Solutions
for AI, Automotive, IoT, Security, Audio & Video...
You are here : design-reuse-embedded.com  > Security Solutions  > Cryptography
       Download Datasheet        Request More Info

Overview

The es4001 AES core implements the Advanced Encryption Standard (Rijndael Algorithm FIPS 197) encoder and decoder. The core encrypts and decrypts in blocks of 128 bits. It supports key length of 128, 192 and 256.

Block Diagram

Features

  • Supports AES FIPS 197 encryption and decryption.
  • High speed operation. 1 clock per 1 step of operation. AES encryption is computed in 10,12 and 14 clock cycles depending on the key length and decryption is computed in 20, 24 and 28 clock cycles.
  • Simple external interface.
  • Simple flow control.
  • Minimal gate count.
  • Support up to 640 Mbps of encryption and 320Mbps of decryption.
  • Available in ASIC and FPGA Technologies.

Partner with us

Visit our new Partnership Portal for more information.

Submit your material

Submit hot news, product or article.

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2018 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted,
reposted, duplicated or otherwise used without the
express written permission of Design And Reuse.