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All Silicon IP

Overview

Brite delivers a versatile Arm Cortex-A9 based solution in SMIC 40nm LL process. In this solution, ARM NIC301 (network interconnect) is adopted for the integration of multiple AXI components. Brite s professional technology and engineering experience can reduce customers efforts dramatically: we customize a complete processor with available peripherals in 3~6 month to meet the time to market. A successful test chip is available for customer evaluation which can be up to 1.3GHz with minimum leakage. Besides Cortex-A9 ,NEON, FPU, etc, core components, it integrates DMA, memory controllers, NOR controllers, display units and other digital interfaces via AXI/APB buses, which demonstrates the capability in integration, validation and implementation. The A9 core number, cache size , FPU/NEON can be configured according the customer s requirement. To increase the performance, L2 cache (L2C310) can be added. Cooperating with Brite, customer can enjoy no risk, the most cost-effective, and minimum design time in your products cycles.

Block Diagram

Features

  • 1-4 cores can be configurable
  • Dual-core in SMIC 40LL test chip reaches 1.3GHz in 25oC, TT
  • Low power design , global ICG insertion
  • High throughput AXI bus
  • Multiple memory controller solutions for SDRAM, DDR2/3 LPDDR/LPDDR2
  • Smart DMA controller embedded
  • Versatile display unit embedded supporting 4:2:0,4:4:4,4:2:2, planar, interleave, package format
  • Easy integration for all application IP such including SD card, Ethernet, USB, GPU, video codec

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