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Overview

The Cadence® Tensilica® Vision DSPs are ideal for all embedded imaging, neural network and computer vision applications. They were designed for the complex algorithms in imaging and computer vision, including innovative multi-frame noise reduction, video stabilization, high dynamic range (HDR) processing, object and face recognition and tracking, low-light image enhancement, digital zoom, gesture recognition, plus many more. The DSPs also offer outstanding performance while running neural networks. The Tensilica Vision DSP family offers two Vision products: the Vision P5 DSP and the Vision P6 DSP. The newly announced Vision P6 DSP sets a new standard in neural network performance by offering 4X the peak performance compared to the Vision P5 DSP.

Block Diagram

Features

Programmable and Customizable The Tensilica Vision DSPs are synthesizable processors, with the configurability and extensibility that users have come to value from Cadence. The instruction set, memory system, and data types have all been optimized for high-throughput 8-, 16-, and 32-bit pixel processing. Highly Energy Efficient The Vision DSP family is highly energy efficient compared to CPUs or GPUs for all kinds of pixel operations. High Performance The Vision P5 and Vision P6 DSPs offer a 5-way VLIW architecture, where each VLIW slot can perform 64-way SIMD 8-bit operations. The Vision family is designed to provide 320 operations per clock cycle. The Vision P6 DSP can achieve even higher efficiency with its wide SIMD multiply-accumulates, offering significantly enhanced performance for the pixel filtering and image analysis features common in computer vision applications.

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