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Scared of Multi-FPGA Prototyping, Don't Be !!!

by Michael Posner - Synopsys Blog, Jan. 25, 2015 – 

Last week I spent a week in Japan visiting users to discuss their FPGA-based prototyping challenges and explain how Synopsys can help. My overall take-away of the visits was that many companies want to expand their current single FPGA-based prototyping to multi-FPGA but fear the challenges associated with this. The summary of what I explained was pretty simple but to the point. #1 Having a defined methodology, flow and tool set is key. #2 Yes Multi-FPGA is more complex but it's not as steep of a learning curve as you may think. And that's it...

#1 Having a defined methodology, flow and tool set is key

In respect to methodology you of course can refer to the FPGA-based Prototyping Methodology Manual, FPMM. I used Google translate so I hope I didn't just offend the whole of Japan. Read the FPMM and you will become an expert prototyper but we all know that in this age of technology a summary is always nice. This is why I blogged about 3 Phase Approach to Successful Prototyping a while back. Yes, this is the blog with the upside down pyramid which at the time I thought was a great way to show the progression down through a funnel. The three phases are "Make Design FPGA Ready", this is all about making the ASIC RTL FPGA friendly. "Bring Up Functional Prototype", this is where you want to get onto the hardware as quickly as possible so you can functionally validate the design. Finally "Optimize Prototyping Performance", pretty self-explanatory really.


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