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Arteris' FlexNoC Again Chosen by AppliedMicro for X-Gene Server-on-Chip Products

Shorter time-to-closure and end-to-end Quality-of-Service (QoS) tuning result in better interconnect performance for Arm-based server SoC

Mar. 31, 2015 – 

Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced that AppliedMicro, also known as Applied Micro Circuits Corporation, has selected Arteris® FlexNoC® for use in its X-Gene™ Server on a Chip Solutions. The proven Arteris FlexNoC fabric IP enables low latency on-chip communication on these extremely complex SoCs, significantly reducing the effort to close timing and increasing performance.

AppliedMicro first licensed the Arteris FlexNoC interconnect IP for its X-Gene Server on a Chip platform development in 2012. FlexNoC fabric IP is the backbone SoC interconnect for the shipping X-Gene product as well as the recently announced second-generation X-Gene 2 product line.

"The AppliedMicro X-Gene server chips are some of the most sophisticated SoC designs leveraging the Armv8 64-bit architecture," said K. Charles Janac, President and CEO of Arteris. "By adopting Arteris FlexNoC fabric IP for the X-Gene platforms, AppliedMicro has cast a convincing vote of confidence in our unique technology and showcased the level of complexity and power savings that our IP enables."

About AppliedMicro
Applied Micro Circuits Corporation is a global leader in computing and connectivity solutions for next-generation cloud infrastructure and data centers. AppliedMicro delivers silicon solutions that dramatically lower total cost of ownership. Corporate headquarters are located in Sunnyvale, California. http://www.apm.com.

About Arteris Inc

Arteris provides Network on Chip (NoC) interconnect IP to improve performance, power consumption and die size of system on chip (SoC) devices for consumer electronics, mobile, automotive and other applications.

Using Arteris solves pain for our customers. Traditional bus and crossbar interconnect approaches create serious problems for architects, digital and physical designers, and integrators: Massive numbers of wires, increased heat and power consumption, failed timing closure, spaghetti-like routing congestion leading to increased die area, and difficulty making changes for derivatives.

Whether you are using AXI, OCP, AHB or a proprietary protocol, Arteris Network on Chip (NoC) IP reduces the number of wires by nearly one half, resulting in fewer gates and a more compact chip floor plan. Having the option to configure each connection s width, and each transaction s dynamic priority, assures meeting latency and bandwidth requirements. And with the Arteris IP configuration tool suite, design and verification can be done easily, in a matter of days or even hours.

Arteris invented Network on Chip technology, offering the world s first commercial solution in 2006. Arteris connects the IP blocks in semiconductors from Qualcomm, Samsung, TI, and others, representing over 50 System on Chip devices. Find out more about Arteris products.

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