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Extending networks to SoC IP saved power at the IoT edge

By Brandon Lewis, Embedded, Nov. 20, 2015 – 

SoC architectures have remained largely the same over the last 20 years, with designers adding IP via the main CPU bus to create increasingly complex, integrated chips. But as SoCs become more mainstream and adapt to power, performance, and time-to-market demands of IoT and other devices, new approaches are required that enable designers to iterate targeted solutions more quickly and effectively. In this interview, Drew Wingard, Co-Founder and CTO of IP design house Sonics Inc., describes how on-chip networks and high degrees of automation are helping vendors optimize IoT edge silicon and prepare for a new era of SoC development.

What can you tell us about Sonics and on-chip networking technology?

WINGARD: The key idea for Sonics as an IP company is that we should leverage networking technologies for trying to connect together the various IP blocks that make up an SoC. The general-purpose processor in many of these systems is just the controller and the piece that?s visible to the software developer for adding applications on top. But the reason we build an SoC is usually the other components on the chip that keep the customer from using an off-the-shelf microprocessor as the only element in the design. We have taken that system view that there is a reason that people are building an SoC ? they?re building an SoC with extra-special hardware because they can do something more efficiently in this optimized hardware instead of just building an array of general-purpose CPUs.

We wanted to use networking technology because it allows us to do a couple of important things. One is, networks are very good at isolating components from each other, or decoupling, and that makes it a lot easier to mix and match. To take things that weren?t designed to work together and make them work together, because as long as they know how to work with the interface to the network, they?re protected from the rest of the system by the network itself. That?s very different from the approach that?s used in most other situations where people try to use computer buses. In the early days of SoCs people said, "we should just use this thing that?s coming out of the microprocessor, and we?ll just hook everything up to that." That builds the opposite design philosophy from Sonics in that everything is massively tied to the processor. So if you want to change the frequency of the processor, then everything that talks to it has to run at a different rate. If you want to upgrade your next design from this generation of Arm processor to that generation of Arm processor and maybe they changed the width of the bus interface to increase the bandwidth from 32- to 64- to 128-bit data, now all of the IP blocks that attach to that interface have to be reworked. As we get to more advanced designs it becomes much, much worse, because as we look at battery-powered things or even things that plug into the wall today, power has become a huge concern, and we have to partition our designs into different pieces so we can slow them down or even shut them off. That implies playing with different clocking rates all over the design; that implies putting in place the appropriate electrical circuits to allow us to shut some parts off and still be safe for the parts that are on. All of those things fall apart whenever everything is tied together and we assume all communication is instantaneous and free.

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