Xilinx adds FPGA acceleration for new data-centre content-transfer framework

AMD, Arm, Huawei, IBM, Mellanox, Qualcomm, and Xilinx have announced a collaboration on a Cache Coherent Interconnect for Accelerators (CCIX) that will allow multiple processor architectures and accelerators to seamlessly share data.

By Graham Prophet ,EETimes, May. 26, 2016 – 

The intention is to create a high-performance open acceleration framework for data centres. The companies are collaborating on the specification for the new Cache Coherent Interconnect for Accelerators (CCIX). A single interconnect technology specification will ensure that processors using different instruction set architectures (ISA) can coherently share data with accelerators and enable efficient heterogeneous computing - significantly improving compute efficiency for servers running data centre workloads.

Accelerating applications in the data centre has (comment from Xilinx) become a requirement due to power and space constraints. Applications such as big data analytics, search, machine learning, NFV, wireless 4G/5G, in-memory database processing, video analytics, and network processing, benefit from acceleration engines that need to move data seamlessly among the various system components. CCIX will allow these components to access and process data irrespective of where it resides, without the need for complex programming environments. This will enable both off-load and bump-in-the-wire inline application acceleration while building on existing server ecosystems and form factors, thereby lowering software barriers and improving total cost of ownership (TCO) of accelerated systems.

Xilinx has added support for the proposed interface to its 16nm UltraScale+ product plans, combining its programmable logic with HBM memory and new accelerator interconnect technology for heterogeneous computing. Built on TSMC's CoWoS process, Xilinx HBM-enabled FPGAs will improve acceleration capabilities by offering 10X higher memory bandwidth relative to discrete memory channels. HBM technology enables multi-terabit memory bandwidth integrated in package for the lowest latency. To handle data centre workloads, the CCIX technology promotes efficient heterogeneous computing by allowing processors with different instruction-set architectures to coherently share data with accelerators - such as the Xilinx HBM-enabled FPGAs.

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