Could FPGA IP be headed to a SoC near you?

Brandon Lewis, Technology Editor, Nov. 10, 2016 – The more integrated, the better. That's truer in the embedded space now than ever before. For proof, look at the system on chip (SoC) landscape.

SoC integration has increased steadily over the past 20 years, originally including embedded memory and power management blocks and now incorporating everything from analog and mixed-signal IP to graphics and digital signal co-processors to security and connectivity subsystems (Figure 1). For higher performance applications the next step in this progression is to enable SoCs with hardware acceleration capabilities, ushering in the next generation of SoC IP -the embedded field-programmable gate array (eFPGA).

[Figure 1 | The evolution of system on chip (SoC) IP integration.]

Accelerating towards embedded FPGA IP

Introduced in the 1980s, the flexibility of FPGAs made them immediately applicable to designs that required transistor-transistor logic (TTL) integration and programmable I/O, as off-the-shelf application-specific standard products (ASSPs) and application-specific integrated circuits (ASICs) were not always equipped with the ports needed for a given system. Coupled with increasing connectivity demands over the ensuing years, that flexibility saw FPGAs used to connect processor arrays in the data center and also deployed as separate co-processors to compute complex, custom parallel workloads in a variety of signal processing applications. The broader use and exposure lead to FPGA density, performance, and cost improvements, and the market for the technology ballooned from $14 million n 1987 to nearly $5.4 billion in 2013.

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