Silvaco Introduces Arm Cortex M0-based I3C Sensor Subsystem

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Santa Clara, CA, Oct. 23, 2017 – 

Silvaco Inc. today announced the availability for licensing the industry's first Arm-based I3C sensor IP subsystem core.

The I3C Sensor Subsystem is an Arm AMBA based system used to build low power SoCs supporting the new MIPI I3C standard for sensor connectivity. The subsystem includes Silvaco's leading edge I3C Dual Role Master controller core. The I3C Dual Role Master controller is a highly configurable I3C master that can be used to provide I3C connectivity to any I3C or I2C device. It contains many of the advanced features of the I3C standard including high data rate DDR modes, in-band-interrupts and a complete slave to enable dynamic master/slave role switching. It can be configured to use the minimum amount of logic to reduce both area (cost) and power.

The I3C Sensor Subsystem is the basic building block for a wide range of low power SoC applications from IoT edge devices, industrial sensors, accelerometers, to I3C-connected devices and personal health monitors. At the heart of the subsystem is the Arm Cortex M0 CPU, which is available without an upfront license fee through the Arm DesignStart™ program.

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