Moortec will be exhibiting their In-Chip Monitoring Subsystem IP at DAC 2018 in San Francisco

Plymouth, UK -- 19th June 2018 -- Moortec Semiconductor will be exhibiting their in-chip monitoring subsystem IP at the 2018 Design Automation Conference which is taking place at the Moscone Center in San Francisco, California from the 24th - 28th June. DAC is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).

During the event there will be an exciting new IoT related product announcement. To find out more come and meet our team of experts at booth #2147 and discuss in person how your advanced node SoC programme can benefit from Moortec's high performance in-chip sensors.

Moortec will also be presenting the TSMC OIP Theatre at DAC. The OIP Theatre will allow TSMC Ecosystem members to demonstrate the collaborative value and benefits of TSMC’s Open Innovation Platform. Moortec’s presentation is entitled “Optimisation and Reliability Enhancement for FinFET Design Applications” and will be presented by CEO Stephen Crosher.

Moortec’s in-chip monitoring solutions also target applications areas such as Datacentre & Enterprise, Automotive, AI, Mobile, Consumer and Telecommunications, which utilise advanced node CMOS technologies.

If you are working on advanced node technologies it is highly likely that your SoC will require monitoring to enhance real-time performance optimisation and lifetime reliability. Understanding how the chip has been made (process) as well as understanding its dynamic conditions (voltage supply and junction temperature) has become a critical requirement for advanced node semiconductor design.

Moortec offers a range of 'off the shelf' monitoring IP on TSMC 40nm, 28nm, 16nm, 12nm and 7nm. Target applications areas such as Datacentre & Enterprise, Automotive, AI, Mobile, Consumer and Telecommunications, which utilise advanced node CMOS technologies.

About Moortec

Established in 2005, Moortec provides compelling embedded subsystem IP solutions for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies from 40nm down to 7nm. Moortec’s in-chip sensing solutions support the semiconductor design community’s demands for increased device reliability and enhanced performance optimisation, enabling schemes such as DVFS, AVS and power management control systems. Moortec provides excellent support for IP application, integration and device test during production. Moortec’s high-performance analog and mixed-signal IP designs are delivered to ASIC and System on Chip (SoC) technologies within the consumer, mobile, automotive, high performance computing and telecommunications sectors. For more information, please visit www.moortec.com.

Moortec will be exhibiting their In-Chip Monitoring Subsystem IP at DAC 2018 in San Francisco

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