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92 Solutions


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1
ARC Debug Option for all ARC Cores
SmaRT is a hardware module that can be integrated into any system-on-chip (SoC) within the DesignWare ARC configurable architecture.

2
ARC SmaRT, optional Real-Time Trace debug
Rapid Program Tracing Spots Hard-To-Find Bugs

3
Coverity : Static Code Analysis
Coverity is an accurate and comprehensive static analysis and Static Application Security Testing (SAST) platform that finds critical defects and security weaknesses in code as it s written before they become vulnerabilities, crashes, or maintenance headaches.

4
DesignWare IP Prototyping Kits

5
DesignWare STAR Memory System

6
DTCP Software Development Kit

7
Ellipsys-SRTP Toolkit

8
FineSim Multi-Core/Multi-Machine Enabled Full-Chip Circuit-Level Simulation

9
Gen4SWITCH PCIe 4.0 Platform Development Kit (PDK)

10
Genus Synthesis Solution
Delivering the best possible productivity during RTL design and the highest quality of results (QoR) in final implementation

11
HDCP 2.0 Software Development Kit

12
Innovative IDE for application software development and debug
SmartVision IDE is a complete application software development and debug platform.

13
IP Prototyping Kit for DWC USB 3.1 Device Controller on HAPS-DX7, SuperSpeedPlus PHY, Type-C, PCIe connection for PC
IP Prototyping Kit for DWC USB 3.1 Device Controller on HAPS-DX7, SuperSpeedPlus PHY, Type-C, PCIe connection for PC

14
Kintex Ultra-Scale-based Prototyping Board
PCIe 3.0 x8 Xilinx UltraScale Board featuring HPC FMC and DDR3 SODIMM connector

15
Low Profile Board XpressV7-LP HE

16
MIPS Navigator Console

17
MIPS Navigator Probes

18
MIPS Navigator with iFlowtrace

19
Navigator Pro Probe for MIPS 32 Cores

20
Palladium Z1 Enterprise Emulation System

21
Protium S1 FPGA-Based Prototyping Platform
The Protium™ S1 FPGA-Based Prototyping Platform is the latest generation prototyping solution enabling early software development, throughput regressions, and high-performance system validation. It combines high-capacity FPGA boards, based on Virtex-Ultrascale FPGAs, with a complete implementation and debug software suite, providing ultra-fast design bring-up and unprecedented ease of use.

22
ProtoCompiler

23
QuickPlay development platform
QuickPlay is a graphical/C/C++ development platform that tightly integrates design IP, FPGA hardware, application software and design tools, allowing developers to build FPGA-enabled applications and have working hardware in record time.

24
reVISION : Responsive and Reconfigurable Vision Systems

25
System Navigator Probe for 8051 Microcontroller Cores

26
System on Module based on Xilinx Zynq

27
Virtualizer Development Kits
Virtualizer Development Kits (VDKs) are software development kits containing design-specific virtual prototypes as well as debug and analysis tools and sample software.

28
Virtuoso System Design Platform
The Virtuoso® System Design Platform links two world-class Cadence technologies–custom IC design and package/PCB design/analysis–creating a holistic methodology that automates and streamlines the design and verification flow for multi-die heterogeneous systems.

29
Xilinx Kintex-7 FPGA Connectivity Kit

30
XpressGX5LP (Stratix V GX)

31
XpressK7
Standard profile Xilinx Kintex-7 based board, featuring partial HPC FMC and DDR3 SODIMM connector. Features for prototyping, development and integration.

32
XpressV6

33
ZeBu-Blade2 Fast ASIC Desktop Emulator

34
Zebu-Server: One Billion Gate, Multi-User/Mode ASIC and SOC Emulation

35
I/O Buffer Information Specification - (Algorithmic Modeling Interface)
IBIS is an I/O Buffer Information Specification commonly used to model the electrical response at the pin of a chip. This interface specification abstracts the driver and receiver characteristics, including parasitics, to provide systems designers with models that emulate actual electrical behavior in an efficient simulation.

36
ZSP-USB-JTAG Emulator

37
ZView IDE - ZSP Development Environment

38
SonicsStudio

39
SoReal! Virtual Platform Service
To help customers shorten time-to-market, provides a virtual platform with IP models right after the system specification confirmed. It makes concurrent hardware and software development possible to reduce time to market effectively.

40
Arria 10 IDK OpenCL BSP

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