ACE works in conjunction with industry-standard synthesis tools, allowing FPGA designers to easily map their designs into Achronix Speedster®22i FPGAs.

SmaRT is a hardware module that can be integrated into any system-on-chip (SoC) within the DesignWare ARC configurable architecture.

Rapid Program Tracing Spots Hard-To-Find Bugs

High Performance Tools for Developing Arm Based HPC Solutions

The Arm SDK-700 System Design Kit offers a solution to help build secure SoCs for rich IoT nodes, gateways, and embedded applications.

Functional safety verification is one of the most critical issues for automobile development. Safety-critical automotive chips require compliance to ISO 26262 ASIL requirements, extending far beyond functional verification.

Applying innovative solution flows, automation tools, and best-in-class verification engines is necessary to overcome the resulting verification gap.

Built for Hybrid Environments

The majority of companies developing ICs have significant investments in computing capacity in the form of on-premises datacenters. For efficiency reasons, c...

Coverity is an accurate and comprehensive static analysis and Static Application Security Testing (SAST) platform that finds critical defects and security weaknesses in code as it s written before they become vulnerabilities, crashes, or maintenance headaches.

This silicon proven, customizable integrated power management subsystem provides a cost-effective single-chip solution for power management. Typical target applications include portable low-power consumer products or any application, with a need to control diverse power domains.

The DesignWare® ARC® HS Development Kit is a ready-to-use platform for rapid software development on the ARC HS3x family of processors.

The DesignWare® HPC Design Kit, part of Synopsys' Foundation IP portfolio, is a suite of high-speed and high-density memories and logic libraries that allow SoC designers to optimize their processor cores for maximum speed, smallest area, lowest power, or an optimum balance of the three for their specific application.

The DesignWare IP Prototyping Kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort and to enable designers to start implementing IP in an So...

The DesignWare Self-Test and Repair (STAR) Memory System is a comprehensive, integrated test, repair and diagnostics solution that supports repairable or non-repairable embedded memories across any fo...

The DesignWare® Self-Test and Repair (STAR) Memory System® is a comprehensive, integrated test, repair and diagnostics solution that supports repairable or non-repairable embedded memories across any foundry or process node.

The ESW-01 DTCP-IP Software Development Kit (SDK) is part of the Ellipsys Security Architecture (ESA) which offers a comprehensive set of security software for embedded applications. Digital media is...

The Secure Real-time Transport Protocol (SRTP) defines a framework which provides confidentiality, message authentication, and replay protection for both unicast and multicast RTP (Real-time Transport...

FineSim is a high-performance accelerated SPICE simulator. FineSim s unique multi-core/multi-machine simulation capability allows users to drastically improve simulation performance and capacity.

FineSim? is a high-performance circuit simulator with built-in full SPICE and FastSPICE simulation engines. FineSim s unique multi-core/multi-machine simulation capability allows users to drastically ...

Delivering the best possible productivity during RTL design and the highest quality of results (QoR) in final implementation

Desktop Prototyping Solution Enables Direct Design Interaction for Pre-Silicon Software Development and Testing

The HDCP 2.0 Software Development Kit (SDK) is a proven, robust and cost effective HDCP 2.0-based copy protection solution for digital entertainment content in the wireless and wireline home network e...

The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box.

SmartVision IDE is a complete application software development and debug platform.

The Cadence® Innovus™ Implementation System is optimized for industry-leading embedded processors, as well as for 16nm, 14nm, 10nm, and 7nm processes, helping you get an earlier design start with a faster ramp-up.

IP Prototyping Kit for DWC USB 3.1 Device Controller on HAPS-DX7, SuperSpeedPlus PHY, Type-C, PCIe connection for PC

Built on a multi-threaded frame-based architecture, the Joules RTL Power Solution delivers 20X faster time-based RTL power analysis as compared to other methods.

Frustrated by all of the manual effort and time you're spending developing complex system-level coverage-driven tests to verify your system on a chip (SoC)? Cadence® Perspec™ System Verifier automates this entire process, reducing complex use-case scenario development from weeks to just days.

The Protium™ S1 FPGA-Based Prototyping Platform is the latest generation prototyping solution enabling early software development, throughput regressions, and high-performance system validation. It combines high-capacity FPGA boards, based on Virtex-Ultrascale FPGAs, with a complete implementation and debug software suite, providing ultra-fast design bring-up and unprecedented ease of use.

The Cadence® Protium™ X1 Enterprise Prototyping Platform is a first-of-its-kind enterprise prototyping platform. Architected from the ground up to provide extreme scalability and flexibility in a data center-optimized form factor, it is addressing your requirements of today, and growing with you, as your designs and demands are growing tomorrow.

Prototypes for pre-silicon system validation and hardware/software integration are essential for today s IP and SoC design teams. But development schedules are short and the brief time from RTL drop ...

The Cadence® Verification IP (VIP) for DisplayPort 2.0 provides a complete bus functional model (BFM) with integrated automatic protocol checks. Incorporating the latest protocol updates, the DisplayPort 2.0 (10Gbps per lane) VIP builds on top of the mature and comprehensive VIP for DisplayPort 8K.

Virtualizer Development Kits (VDKs) are software development kits containing design-specific virtual prototypes as well as debug and analysis tools and sample software.

The Virtuoso® System Design Platform links two world-class Cadence technologies–custom IC design and package/PCB design/analysis–creating a holistic methodology that automates and streamlines the design and verification flow for multi-die heterogeneous systems.

Verifying that system-on-chip (SoC) designs function correctly prior to manufacturing is a massive task requiring high-performance computing (HPC).

The ZeBu-Blade2 hardware-assisted verification platform is the newest member of the ZeBu emulation family, and the first based on Xilinx Virtex6-LX760 field programmable gate arrays (FPGAs). Emulating...

ZeBu-Server is an extremely high capacity system emulator with the easy setup and debugging associated with emulation, and the price/performance of rapid prototyping. Supporting multiple users, interf...

The ZSP-USB-JTAG emulator probe enables efficient and productive embedded software debugging. This compact and portable probe is powered by the USB port and utilizes the JTAG interface for debugging Z...

The ZView Integrated Development Environment (IDE) features a debugger as part of the Eclipse software development environment. Eclipse is an open, industry supported, extensible, software development...