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Hot Product
  (101)
101 "Hot Product" Solutions

1
MIPI D-PHY Tx 4 Lanes - TSMC7FF18, North/South Poly Orientation
Synopsys offers a high-quality, silicon-proven D-PHY IP solutions that are available today in advanced process technologies.

2
SAS Initiator Controller IP
This Initiator Controller IP supports 12.0/6.0/3.0/1.5Gbps data rates and many enterprise level features including SCSI SBC-2 End-to-End Protection (DIF) and high performance, full duplex DMA with IEEE 1212.1 Scatter/Gather.

3
12-bit, 320MSPS, 0.8V High Speed SAR IQ-ADC in TSMC12FFC
The DesignWare Data Converter IP products offer very high performance, high speed, ultra low power dissipation, small area use, and support for a wide range of foundry process technologies ranging from 180-nm to 28-nm.

4
AHB compliant Cache controller to meet growing demand for both energy efficient and faster SoC with NVM
  • 1. TSMC Soft IP qualification (IP9000)

5
DDR5 Controller and PHY

Cadence has prototyped the world's first IP interface in silicon for a preliminary version of DDR5 standard. A test chip contains the next-generation memory interface IP based on the industry c...


6
Design IP Portfolio
Cadence® IP solutions offer the combined advantages of a high-quality portfolio, an open platform, a modern IP factory approach to quality, and a strong ecosystem.

7
DesignWare 12-bit Current-Steering IQ-DAC with 640MSPS Sampling Rate in TSMC 16FFC
With more than 15 years of experience in developing analog IP solutions, Synopsys offers a comprehensive portfolio of more than 100 silicon-proven DesignWare® Data Converter IP products consisting of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), auxiliary converters, video DACs (VDACs) and analog front-ends (AFEs).

8
DesignWare 56G Ethernet PHY IP
The DesignWare 56G Ethernet PHY IP meets the growing high bandwidth and low latency needs of high-performance data center applications.

9
DesignWare 56G Ethernet PHY IP in 7-nm

The DesignWare 56G Ethernet PHY IP meets the growing high bandwidth and low latency needs of high-performance data center applications. Using leading-edge design, analysis, simulation, and measurem...


10
DesignWare Controller IP for CCIX 1.0 and PCIe 4.0
Synopsys' complete DesignWare CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports cache coherency for high-performance cloud computing applications.

11
DesignWare Controller IP for CCIX v1.0

Synopsys' complete DesignWare CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports cache coherency for high-performance clo...


12
DesignWare CSI-2 Device Controller IP
Synopsys, Inc.

13
DesignWare DDR4/3 PHY IP in TSMC 12FFC Process

The Synopsys DesignWare® DDR4/3 PHY is a complete physical layer IP interface (PHY) solution for enterprise-class ASIC, ASSP, and system-on-chip (SoC) applications requiring high-performance DD...


14
DesignWare DDR5/4 PHY IP for TSMC 16FFC
The Synopsys DesignWare® DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-performance DDR5/4 SDRAM interfaces operating at up to 4800 Mbps.

15
DesignWare DDR5/4 PHY IP for TSMC 7-nm

The Synopsys DesignWare® DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-performance DDR5/4 SDRAM interf...


16
DesignWare HDMI 2.1 Audio PLL IP in TSMC 12FFC
The Synopsys DesignWare® HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement and verify designs for various HDMI-based applications.

17
DesignWare HDMI 2.1 RX IP for TSMC 12FFC Process

The Synopsys DesignWare® HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the necessary logic to implement ...


18
DesignWare IP for PCI Express 4.0 in Samsung 14LPP Process

The multi-channel DesignWare PHY IP for PCI Express® (PCIe®) 4.0 includes Synopsys' high-speed, high-performance transceiver to meet today s demands for higher bandwidth. The PHY is sma...


19
DesignWare LPDDR4X multiPHY IP for GF 14LPP
The DesignWare LPDDR4 multiPHY is Synopsys' second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system-in-package applications requiring high-performance LPDDR4, LPDDR3, DDR4, DDR3, and/or DDR3L SDRAM interfaces operating at up to 4,267 Mbps.

20
DesignWare LPDDR5/4/4X PHY IP for TSMC 16FFC

The DesignWare LPDDR5/4/4X PHY is Synopsys' physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and systemin-package applications requiring high-performance LPDD...


21
DesignWare MIPI D-PHY IP for TSMC 16FFC
The increasing popularity of smartphones and other multimedia enabled mobile devices along with the demand for enhanced multimedia features are pushing device manufacturers to integrate more advanced ...

22
DesignWare MIPI D-PHY IP for TSMC 7FF

The increasing popularity of smartphones and other multimedia enabled mobile devices along with the demand for enhanced multimedia features are pushing device manufacturers to integrate more advanc...


23
DesignWare MTP ULP NVM IP for TSMC 180-nm

The Synopsys DesignWare® Multi-Time Programmable (MTP) Ultra Low-Power (ULP) Non-Volatile Memory (NVM) IP reduces area and power while increasing the write cycle endurance specification. The NV...


24
DesignWare Multi-Protocol 16G PHY IP in TSMC 12FFC Process
The multi-lane DesignWare® Multi-Protocol 16G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth and low latency in enterprise applications.

25
DesignWare Multi-Protocol 16G PHY IP in TSMC 16FFPGL Process
The multi-lane DesignWare® Multi-Protocol 16G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio, meeting the growing needs for high bandwidth and low latency in enterprise applications.

26
DesignWare Multi-Protocol 25G PHY IP for TSMC 12FFC

The multi-lane DesignWare® Multi-Protocol 25G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio for high-end networking and cloud computing applications. The PHY...


27
DesignWare Multi-Protocol 25G PHY IP for TSMC 7-nm
The multi-lane DesignWare® Multi-Protocol 25G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio for high-end networking and cloud computing applications.

28
DesignWare Multi-Protocol 25G PHY IP for TSMC 7FF
  • Supports 1.25 to 25.8 Gbps data-rate
  • Supports PCI Express 4.0 with lane margining, 1G to 100G Ethernet, CCIX, and SATA protocols
  • Supports x1 to x16 macro configu...

29
DesignWare Multi-Protocol 25G PHY IP in TSMC 16FF
The multi-lane DesignWare® Multi-Protocol 25G PHY IP is part of Synopsys' high-performance multi-rate transceiver portfolio for high-end networking and cloud computing applications.

30
DesignWare PHY IP for PCI Express 4.0 in TSMC 16FFC

The multi-channel DesignWare PHY IP for PCI Express® (PCIe®) 4.0 includes Synopsys' high-speed, high-performance transceiver to meet today s demands for higher bandwidth. The PHY is sma...


31
DesignWare PHY IP for PCI Express 5.0 in TSMC 16FFC
The multi-channel DesignWare® PHY IP for PCI Express® (PCIe®) 5.0 includes Synopsys' high-speed, high-performance transceiver to meet today's demands for higher bandwidth.

32
DesignWare PHY IP for PCI Express in TSMC 12FFC

The multi-channel DesignWare PHY IP for PCI Express® (PCIe®) 4.0 includes Synopsys' high-speed, high-performance transceiver to meet today s demands for higher bandwidth. The PHY is sma...


33
DesignWare SD/eMMC PHY IP in TSMC 12FFC
The DesignWare® SD/eMMC PHY IP, compliant with the latest JEDEC and SD specifications, is a fully integrated hard macro with high-speed IOs and Delay Locked Loop (DLL)/delay lines.

34
DesignWare tRoot Hardware Secure Modules with Root of Trust: IP for Deeply Embedded Security

DesignWare® tRoot™ Hardware Secure Modules (HSMs) with Root of Trust enable connected devices to securely and uniquely identify and authenticate themselves to create secure channels for r...


35
DesignWare UFS 3.0 Host Controller IP with Inline Encryption

The DesignWare® Universal Flash Storage (UFS) Host Controller IP is a standard-based serial interface engine for implementing the JEDEC UFS interface in compliance with the JEDEC UFS, UFS Host ...


36
Gen4SWITCH Multi-DS
PLDA s Gen4SWITCH Multi-DS Platform is the Industry s first PCIe 4.0 switch platform with multiple-downstream ports (up to 3 Downstream ports) using PLDA's XpressSWITCH IP.

37
I3C HCI Master Controller
The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility.

38
LPDDR4X multiPHY - TSMC12FFC18
The Synopsys DesignWare LPDDR4 multiPHY is a complete physical interface solution for many different kinds of JEDEC -standard mobile and PC/consumer SDRAMs.

39
ONFI 4.1 NAND Flash Controller
The Arasan NAND Flash Controller IP Core is a full featured, easy to use, synthesizable core, easily integrated into any SoC or FPGA development.

40
PCI Express 4.0 PHY in TSMC 12FFC Process

The multi-channel DesignWare PHY IP for PCI Express® (PCIe®) 4.0 includes Synopsys' high-speed, high-performance transceiver to meet today s demands for higher bandwidth. The PHY is sma...


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