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46 "Wireline Communication" Solutions

1
DesignWare CCIX IP Solutions
This CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports cache coherency for high performance cloud computing applications.

2
RAMLinx interconnect
RAM of any size and kind in your EFLX® array

3
C2C Chip to Chip Link Inter-chip Connectivity IP
The purpose of inter-chip connectivity IP is to connect two different chips together to share computing resources, limit chip-to-chip latency, or maintain the highest possible chip-to-chip bandwidth. ...

4
FlexLLI MIPI Low Latency Interface (MIPI LLI) Digital Controller Interchip Connectivity IP
Arteris FlexLLI digital controller IP is the industry s first and only silicon-proven implementation of the MIPI Low Level Interface (LLI) specification. Arteris FlexLLI digital controller IP can con...

5
FlexNoC Network on Chip SoC Interconnect IP
FlexNoC is the ideal interconnect for SoC designs requiring higher performance with minimum area and power. Its flexible architecture makes it the right solution for interconnects with both low latency requirements and high throughput needs. FlexNoC provides support for the additional features that today SoCs require, such as clock domain conversion, width conversion, security, and multi-protocol support. The product supports the AMBA (APB, AHB, AXI) protocols and OCP and can easily be extended to support proprietary protocols.

6
FlexNoC Resilience Package
For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required to meet the more stringent ISO 26262 ASIL and IEC 6...

7
FlexNoC Resilience Package IP
The Arteris FlexNoC Resilience Package is a complementary product to Arteris FlexNoC fabric IP. It implements hardware resilience features essential for systems-on-chip (SoCs) targeted for mission-cri...

8
Mobiveil RapidIO Controller (GRIO)
Generic RapidIO (GRIO) controller is a highly flexible and configurable IP to provide RapidIO interface on one side and a generic interface on the system side.

9
Ncore Cache Coherent Interconnect IP
For scalable and area-efficient heterogeneous cache coherent systems.

10
PIANO 2.0 Automated Interconnect Timing Closure Technology
PIANO 2.0 solves back-end timing problems with technology that works earlier in the SoC design flow, thereby reducing schedule risk.

11
NetSpeed Gemini
Gemini is the industry s first and only fully configurable cache-coherent network-on-chip IP. It enables SoC architects to rapidly design, analyze and create efficient, scalable cache-coherent interconnects.

12
200/400 Gigabit Ethernet MAC and PCS Solution
Traffic demand in the carrier backbone continues to grow rapidly, driven by a number of popular applications such as IPTV, video-on-demand services, remote storage, mobile broadband services, and VPN ...

13
Dual ODU0 Mapper / Demapper
The Xelic Optical Transport Network (OTN) Dual ODU0 Mapper/Demapper performs mapping/demapping of two 1000 BASE-X Gigabit Ethernet signals encapsulated in transparent GFP frames to/from a single OTN ODU1 frame format or two independent ODU0 data streams.

14
Dual Port Gigabit Ethernet Transcode Application
The Xelic XA304 Application supports the mapping of dual Transcoded Gigabit Ethernet signals into ODU0 frames and ODTU01 multiplexing for ODU1/OTU1 frame rate transport.

15
Ethernet- over- Coax MAC/PHY Transceiver
The CREDO C8800(P) is a MAC/PHY transceiver optimized for Ethernet-over-Coax (EoC) applications. It includes an EPON-based MAC and an OFDM +LDPC PHY. The C8800 can be used for channels such as coax ca...

16
Multi-Rate and Multi-Channel 4-Lane 10/40 MAC and PCS
4-Lane 10/40 Geth Hydra Core - flexible integrated Ethernet MAC and PCS Core designed to comply with the IEEE802.3 specifications for 10/100/1000Mbps, 10Gbps and 40Gbps meeting the requirements for both WAN / MAN and LAN connectivity

17
Multi-Rate and Multi-Channel 4-Lane 10/40/100 MAC and PCS
4-Lane 10/40/100 Geth Hydra Core - designed to comply with the IEEE802.3 specifications for 10/100/1000Mbps, 10Gbps, 40Gbps and 100Gbps meeting the requirements for both WAN / MAN and LAN connectivity.

18
Multi-Rate and Multi-Channel 12-Lane 10G/40G/100G MAC and PCS
12-Lane 10/40/100 Geth Hydra Core- flexible integrated Ethernet MAC and PCS Core designed to comply with the IEEE802.3 specifications for 10/100/1000Mbps, 10Gbps, 40Gbps and 100Gbps meeting the requirements for both WAN / MAN and LAN connectivity.

19
Netspeed Orion
Starting with high-level system requirements as inputs, Orion uses its built-in interconnect synthesis engine to construct an optimized network-on-chip solution.

20
NetSpeed Pegasus
Last Level Cache IP. Pegasus is a highly customizable and configurable last level cache that eliminates memory bottlenecks and boosts overall system performance.

21
XS700 40G OTN Transponder
The Xelic 40G Optical Transport Network (OTN) Transponder provides the flexible transport of signals through a configurable highly integrated subsystem.

22
XS701 40G OTN Transponder
The Xelic 40G Optical Transport Network (OTN) Transponder provides the flexible transport of signals through a configurable highly integrated subsystem.

23
XS800 100G OTN Transponder
The Xelic 100G Optical Transport Network (OTN) Transponder provides the flexible transport of signals through a configurable highly integrated subsystem.

24
XS801 100G OTN Transponder
The Xelic 100G Optical Transport Network (OTN) Transponder provides the flexible transport of signals through a configurable highly integrated subsystem.

25
10-Gbit Ethernet MAC Engine + AMBA 2.0
Highly customizable hardware IP block. Easily portable to Structured ASIC flow, Custom ASICs/SoCs, Xilinx FPGAs. INT-10001 is highly flexible that is customizable for layer-2 through Layer-7 network ...

26
Ethernet 1G/10G Switch for low latency applications
Arastu System's Ethernet 10G Switch IP Core is designed to fit into today's FPGA and ASIC technologies with low gate count.

27
Highly configurable Interlaken ILA & ILK
Tamba Networks offers a highly configurable Interlaken ILA and ILK core. The core is compliant with the Interlaken and Interlaken look-aside specifications, and targets FPGA and ASIC operation. The S...

28
OCP Interface

IDesignSpec™ is an award winning product that helps IP/SoC design architects & engineers to create simple yet powerful specification in MS Word, Excel, Libre Office or plain text. The specifi...


29
Sonics3220 peripheral on-chip communications network
SonicsGN (SGN) is Sonics 4th generation, configurable, on-chip network enabling the design of advanced SoC communications networks using a high-speed scalable fabric topology structure. As the indust...

30
SonicsExpress High Bandwidth OCP2 Bridge
SonicsExpress provides a high bandwidth bridge between two clock domains, with optional voltage domain isolation. SonicsExpress supports AXI or OCP protocols and is capable of crossing clock boundarie...

31
SonicsGN-The Industry s First GHz Network-on-Chip
SonicsGN (SGN) is Sonics 4th generation, configurable, on-chip network enabling the design of advanced SoC communications networks using a high-speed scalable fabric topology structure.

32
SonicsLX on-chip communications network
SonicsLX on-chip communications network contains a high performance advanced fabric with data flow services for the development of complex SoCs. SonicsLX utilizes state-of-the-art physical structure d...

33
SonicsSX on-chip communications network
The SonicsSX on-chip communications network contains a high performance, advanced fabric and a comprehensive set of data flow services for the development of complex, multicore and multi-subsystem SoC...

34
Standard Compliant AMBA AXI SoC Interconnect, Soft IP
The AMBA AXI interface is targeted at high-performance, high-frequency system designs and includes a number of features that make it suitable for a high-speed submicron interconnect. The AXI protocol ...

35
Universal Ethernet MAC
The Universal Ethernet MAC/PCS offers industry s lowest latency, power, and size.

36
WISHBONE SoC Interconnect

IDesignSpec™ is an award winning product that helps IP/SoC design architects & engineers to create simple yet powerful specification in MS Word, Excel, Libre Office or plain text. The specifi...


37
Gen-Z Physical Layer for 802.3
The IPC-GZ196A-ZM Gen-Z Physical Layer for 802.3 is an IP Core that allows companies to attach a Gen-Z core to an 802.3 Phy.

38
HPS - HSR-PRP Switch IP Core
HSR-PRP Switch (HPS) is an IP Core for the implementation of High-availability Seamless Redundancy and Parallel Redundancy Protocol standards for Reliable Ethernet communications.

39
LDPC Encoder/Decoder IP Core
Low-density parity check (LDPC) technology provides the high level of error correction needed for today’s low cost and high density flash memories. Symbyon’s patented solution is the most ...

40
Managed Ethernet Switch (MES) IP, supporting IEEE 1588 V2 One Step Transparent Clock P2P functionality
Managed Ethernet Switch (MES) IP core features a non-blocking crossbar matrix that allows continuous transfers between all the ports. It implements a Store & Forward switching approach that fulfills E...

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