www.design-reuse-embedded.com
   Noesis Technologies specializes in design,development and marketing of high quality, cost effective communication IP cores and provides expert ASIC/FPGA design services in telecom DSP area. Our solutions are key components to the most sophisticated telecom systems. Backed-up by our leading-edge expertise on forward error correction, encryption and networking technology as well as on DSP algorithm development we provide robust solutions that are used to improve data quality, increase bandwidth or reduce the overall system cost of end-application.   
4 SoCs

1
High Throughput Additive White Gaussian Noise Generator
A configurable AWGN generator that can be used as emulator of a noisy transmission channel and can support very high throughput rates up to 10 Gbps.

2
NIST FIPS-197 Compliant Ultra-Low Power AES IP Core
ntAES8 core implements NIST FIPS-197 Advanced Encryption Standard. ntAES8 core can be programmed to encrypt or decrypt 128-bit blocks of data using a 128-bit, 192-bit or 256-bit key.

3
Noesis Technologies - SoC Design Services
Noesis Technologies can offer expert ASIC, FPGA and DSP development resources to get your product in the market quickly.

4
XTS mode AES Processor
The ntAES_XTS IP Core is fully compliant with AES-XTS algorithm standardized at NIST SP800-38E and IEEE 1619-2007 recommendations targeting disk encryption applications at sector (data unit) addressable level.

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