D&R News Alert
www.design-reuse-embedded.com
July 2nd, 2020
In this issue
• Optimized for AI Accelerator Applications, GLOBALFOUNDRIES 12LP+ FinFET Solution Ready for Production
• FPGAs to Replace GPUs in AI Accelerators
• Huawei makes new chip supply deals with SMIC and Shanghai Microelectronics
• HiSilicon & Nowi Introduce Energy Autonomous NB-IoT Platform
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Welcome to the issue of July 2nd, 2020 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

Technology Process
Moortec In-Chip Monitoring, Telemetry & Analytics

Moortec • Silicon assessment during manufacture & test
• Real-time, deeply embedded chip monitoring
• Feature-rich subsystem integration for advanced nodes down to 5nm
• Trusted delivery since 2010
Learn more...

Foundry News
Design and Monitoring
White Paper from Vidatronic
Risc Processor

NOEL-V 64-bit RISC-V Processor Released in Source Code

Cobham Gaisler • RISC-V RV64IMAFD compliant implementation
• Dual-issue pipeline, caches, branch prediction
• VHDL RTL IP core with AMBA bus interface
• Provided in Open Source under GPL or commercial license
Learn more...

Automotive
Artificial Intelligence
Adicsys ADICSYS provides embedded FPGA cores in the form of technology independent soft IPs suited for both digital and mixed signal SOCs
• First 100% synthesizable HDL soft IP on the market
• Patented & Innovative FPGA architecture achieving best in class silicon density
• ADICSYS FPGA tool chain without third party costs
Learn more...

Multimedia
New Products
Internet of Things
D&R Welcomes its new partner
EpicLink
EpicLink
• Wireless transceiver and modem IPs for IoT applications
• Ultra-high performance, ultra-low power, and small footprint
IoT Solutions >>

5G, Network and Wireless
Business news
Webinar
Optimizing embedded RISC-V hardware/software development from virtual models to in-life silicon instrumentation
Join Andes, Imperas, & UltraSoC to learn about optimizing embedded RISC-V hardware/software development from virtual models to in-life silicon instrumentation from virtual models to in-life silicon instrumentation

When : July 15th 2020 at 8AM PDT & 5PM PDT                            Register Now
Andes, Imperas and UltraSoc




D&R D&R IP Soc 2020
China - Virtual Event
September 15th, 2020

Hot at IP SoC Silicon Valley Virtual Event


300Mn gate Data Centre SoC challenges and PPA insights
Maulik Patel, eInfochips, Physical Design Lead


Novel Design Architecture to Lower Power and Improve Performance of Clocks, Sensors and IO's in 5nm
Mahesh Tirupattur, Analog Bits Inc., Executive VP Sales, Marketing & Operations


Automotive-Qualified IP for Evolving Integrated ADAS Domain Controller SoCs
Ron DiGiuseppe, Synopsys, Inc., Senior Strategic Marketing Manager


The Evolution of High-Speed SerDes PHY IP for High-Performance Computing & Networking SoCs
Manmeet Walia, Synopsys, Inc., Senior Product Manager for Mixed-Signal PHY IP at Synopsys


How access to the world's broadest IP portfolio enables commercial success in SoC projects
Olivier Bernard, Arm, Director, High Performance IoT


Patenting for the Small Company
Jonah Probell, SoundHound, Inc., IP Strategist


IP Provider the Seed of Innovation in Electronic Industry. Can IP Innovation be Measured?
Gabriele Saucier, Design And Reuse, CEO & Founder

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