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What Makes Secure Processors Different?

Rambus Offers a Separate CPU to Secure Your Normal One

eejournal.com, Jan. 14, 2020 – 

"The optimist proclaims that we live in the best of all possible worlds. The pessimist fears this is true." ― James Branch Cabell

Given the magnificent complexity of modern microprocessors, it's inevitable that they'll have bugs and security holes. It might even be physically impossible to create a bug-free CPU, but that's a mathematics/physics/EDA/statistics/philosophical conundrum that's above my paygrade. For now, we finds the bugs and we works around 'em.

But what if...

What if a processor could be designed with security in mind, first and foremost? Would that be possible, and if so, would it be useful? Or, would a maximum-security CPU be uselessly slow, complicated, and unwieldy?

It's a thorny problem, and one not easily solved – or even answered. After all, it's not as though today's CPU designers are slacking off and deliberately allowing bugs to creep in. It just happens, and it might not be possible to do any better.

Rambus thinks it has one good solution, however, and that's to make a security-first processor that sits alongside your normal one. It's a coprocessor to handle the usual cryptography tasks, but one that also is designed and hardened against weird side-channel attacks like clock glitching, undervoltage dips, spooky RF emissions, physical tampering, and the like. It's like having a bodyguard to stand over your main processor.

The company calls it CryptoManager Root of Trust, and it comes in seven different levels of complexity, from a quick-and-dirty IoT version to the fiendishly complex military edition. Much of its block diagram is familiar: RISC-V processor core, AES and SHA accelerators, hardware root of trust, ECC hardware, and so on. These are fine features, but they're often included in high-end CPUs or available elsewhere from other hardware vendors.

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