New RISC-V Solution: SAFERTOS for IAR Embedded Workbench for RISC-V

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SAFERTOS and IAR Embedded Workbench for RISC-V are available on the RISC-V board HiFive1 from SiFive to form a compelling RISC-V safety solution. A free, fully functional demo of the solution is available from the WITTENSTEIN high integrity systems website.

Bristol, UK, Jan. 21, 2020 – 

SAFERTOS is available integrated with the complete C/C++ compiler and debugger toolchain IAR Embedded Workbench for RISC-V on the HiFive1. This integration is built for safety from the outset, with SAFERTOS available pre-certified to IEC 61508 SIL3 and ISO 26262 ASIL D. RISC-V is an exciting modern Instruction Set Architecture (ISA) with huge possibilities.

SAFERTOS is a pre-emptive, safety critical RTOS from WITTENSTEIN high integrity systems that delivers unprecedented levels of determinism and robustness to embedded systems, whilst using minimal resources. It is used internationally across a range of safety critical applications and is renowned for its high quality. SAFERTOS is available pre-certified to ISO 26262 ASIL D and IEC 61508 SIL 3 by TÜV SÜD. A key advantage of SAFERTOS is the upgrade path from FreeRTOS to SAFERTOS; prototype using FreeRTOS and convert to SAFERTOS at the start of formal development.

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