SoM is built around multi-core RISC-V SoC FPGA

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The M100PFS SoM developed by Aries Embedded is based on the PolarFire SoC, Microchip's SoC FPGA family that combines a high-performance 64-bit RISC-V multicore processor subsystem with low-power FPGA technology.

eenewseurope.com, Jan. 29, 2020 – 

Well suited for secure, power-efficient computation in a wide range of applications, the 74x42mm M100PFS SoM runs with low device static power, low inrush current and low-power transceivers. The PolarFire FPGA technology stands out for its reliability with single-event upset (SEU) immunity, built-in SECDED and LSRAM memory interleaving built into the FPGA fabric. In addition, SECDED runs on all processor memory resources and the system controller suspend mode serves safety-critical designs. Several features support security aspects: for example, Cryptography Research Incorporated (CRI)-patented differential power analysis (DPA) bit stream protection, integrated dual physically unclonable function (PUF), and 56 KB of secure, non-volatile memory (sNVM).

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