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Low-Latency Ethernet MAC IP Core from CAST now ASIL-D Certified

ASIC and FPGA IP core is ready to reduce development time and risk for automotive system designers using Time Sensitive Networking (TSN) Ethernet

Automotive Ethernet Congress, Munich, Germany — February 11, 2020 — Semiconductor intellectual property (IP) provider CAST, Inc. today announced that the Low-Latency Ethernet Media Access Controller IP core it offers is now certified to conform to the ISO-26262 safety standard and is available ASIL-D ready.

The LLEMAC-1G Low-Latency 10/100/1000 Ethernet MAC core features extremely low input and output latencies, making it ideal for TSN Ethernet nodes, live video streaming, and other systems requiring minimum delays in the reception and transmission of Ethernet frames. The company believes it is the first such low-latency EMAC ASIC and FPGA core to achieve ASIL-D safety certification, the highest degree of safety compliance under the ISO-26262 standard. This makes the LLEMAC-1G a smart choice for use with TSN Ethernet for the most life-critical automotive systems, including brakes, airbags, and power steering.

CAST LLEMAC-1G Low-Latency Ethernet MAC IP Core Block Diagram



Low-Latency 10/100/1000 Ethernet MAC IP Cores

Sourced from partner Fraunhofer IPMS, the LLEMAC-1G core is compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications. It enables high-precision synchronization in TSN networks, with extremely competitive latencies of just six clock cycles for the reception and ten clock cycles for the transmission of packets. The Safety Enhanced version of the core includes an ISO-26262 “ASIL-D Ready” certificate, issued by SGS-TÜV Saar GmbH, as well as the Safety Manual (SAM) and Failure Modes, Effects and Diagnostics Analysis (FMEDA) needed for efficient ASIL-D implementation.

Visitors to the 6th Automotive Ethernet Congress this week in Munich can discuss the new core with the Fraunhofer IPMS/CAST automotive networking team in booth 18C.

The LLEMAC-1G is available now, in synthesizable Verilog source code or as a targeted netlist for Intel, Xilinx, or Lattice FPGA devices. It joins TSN Switched Endpoint, TSN Endpoint, and CAN-to-TSN Gateway cores in CAST’s popular Automotive Interfaces family, which also includes IP for CAN 2.0/FD, LIN, and SENT. These are part of CAST’s broader IP portfolio, including 32- and 8-bit processors; hardware compression/decompression engines for data, images, and video; and numerous other interfaces and peripherals.

Learn more about CAST’s complete line of IP by visiting www.cast-inc.com, emailing info@cast-inc.com, or calling +1 202.891.8300.

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