Highlights of the TSMC Technology Symposium – Part 3

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semiwiki.com, Sept. 09, 2020 – 

Recently, TSMC held their 26th annual Technology Symposium, which was conducted virtually for the first time. This article is the last of three that attempts to summarize the highlights of the presentations. This article focuses on the technology design enablement roadmap, as described by Cliff Hou, SVP, R&D.

Key Takeaways

• Design enablement is available for N7, N6, N5, and N3, both EDA reference flows and Foundation IP.
• N3 "specialty" IP is in development, in collaboration with the IP Partners.
• Automotive (AEC-Q100) Grade 1 qualification is progressing for N7, offering an attractive PPA migration from N16 (available 4Q20).
• EDA tool support is available for leading 2.5D/3D package technologies: SoIC, InFO, CoWoS. New EDA flow support required for (>1X reticle size) packages will be available 4Q20 (e.g., package warpage analysis).

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