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Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy

Nov. 21, 2024 – 

New RISC-V core design with smart memory controller dramatically speeds up calculations and significantly reduces energy consumption

Cambridge, UK — 21 November 2024 — Blueshift Memory, designer of a novel proprietary high-speed memory architecture, has announced the availability of a RISC-V processor reference design that addresses the twin problems facing today’s computing industry: the Memory Wall and the Energy Wall.

The BlueFive™ processor reference design achieves between five times and 50 times faster benchmarked calculation speed, depending on application and computing language.

The innovative CPU design also saves between 50% and 65% of energy consumption by reducing unnecessary data movement. According to Goldman Sachs, a 160% increase in data centre power demand is expected between 2024 and 2030, driven by the demands of AI.

BlueFive is based on an open-source RISC-V core from the OpenHW Group. The CPU design integrates Blueshift Memory’s Yonder™ smart cache and BlueBlaze™ intelligent memory controller to actively manage the data, reducing memory-to-CPU latency to zero as well as accelerating calculations and saving energy.

“The hardware was initially created under our successful Innovation UK Smart grant project, and it has since been refined as a reference design for a standalone processor. We are creating the software environment for this CPU with TensorFlow, Redis and C/C++ libraries, which will also make it accessible for Python,” said Peter Marosan, founder and CTO of Blueshift Memory.

“Our CPU design has been validated in FPGA using the industry-standard STREAM benchmark, as well as with real-life applications like computer vision AI and the Redis in-memory database,” said Dr Sarmad Adeel, Senior Embedded Systems Engineer at Blueshift Memory.



RISC-V IP Cores

Blueshift Memory’s award-winning non-Von Neumann computer architecture works best when integrated into the memory as well as the CPU, but its innovative memory controller technology still offers significant benefits in combination with either of these components on their own.

More than 90% of the time taken for an AI model to respond to a user query is wasted moving data backwards and forwards between logic and memory chips, according to SK Hynix in a recent article in The Economist. This data transfer also wastes a considerable amount of energy.

“Our design is already validated on hardware, unlike other CPU solutions that aim to accelerate calculation, or offer only simulated results. It specifically addresses the Memory Wall – the fundamental problem that memory technology has fallen behind processor advances, and is holding back progress,” said Helen Duncan, CEO of Blueshift Memory. “We are already working with a commercial partner who will be a channel for our RISC-V solution. We are additionally making this reference design available for other customers to use, to create their own high-efficiency CPU designs.”

“We are collaborating with a manufacturer in SE Asia as well, to create a Blueshift Memory-enabled high bandwidth memory chip, and we will make a further announcement about this very soon,” said Peter Marosan.

Forecasts from Arete Research, quoted by The Economist, indicate that the market for high bandwidth memory has grown by 450% in the past year, and is expected to reach $81 billion in 2026.

About Blueshift Memory

Blueshift Memory’s proprietary chip design optimizes the memory architecture for more efficient handling of large data sets and time-critical data, enabling up to 1,000 times faster memory access for specific data-focused applications. These include high performance computing, artificial intelligence (AI), machine vision for augmented and virtual reality (AR/VR), 5G edge connectivity and the Internet of Things (IoT). The focus of Blueshift Memory’s technology is the Cambridge Architecture™, the next-generation technology for stored-program machines, designed to replace the currently-used modified Harvard architecture and to overcome the traditional constraints of the von Neumann bottleneck. For more information see www.blueshiftmemory.com.

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