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Truechip Solutions - Design and Verification services

Overview

Truechip, the Verification IP specialist, is a leading provider of Design and Verification solutions - which help you, accelerate your design, lowering the cost and the risks associated with the development of your ASIC, FPGA and SOC. Truechip is a privately held company, with a global footprint and sales coverage across North America, Europe and Asia.
Truechip has been serving customers since last 10? years in VLSI with a strong and experienced leadership. Truechip provides industry’s first 24x5 support model with specialization in VIP integration, customization and SOC Verification.

DFT Services


We provide the following services related to DFT :
  • Scan
    • Scan stitching
    • Scan compression (TestKompress)
    • Scan design architecture
    • ATPG and Simulations
  • Memory BIST
    • Memory Fault models and BIST architecture
  • JTAG & Boundary scan

Our team is skilled on the following tools:
  • DFT Tools
    • DFTAdvisor, Fastscan, TestKompress, Tetramax
  • Simulation Tools:
    • VCS, Questa, NC-Sim

    Verification IP Customization


    Verification IP development is our core comepetency. We have teams with in-depth knowledge of the interface protocols, whether it be AMBA, MIPI, PCI, USB or SATA. We currently offer off the shelf VIPs for AMBA, MIPI and USB. If you have any specialized requirements that require customization of any of these interface protocols, or development of a custom interface, we have the right expertise to do it efficiently, while ensuring highest standards of quality.
    Our VIP Development methodology has been uniquely designed to shorten turn - around time for new interface protocol development significantly, and uses one of a kind techniques in the industry to ensure highest standards of quality.

    Our development team is also available to work with the CAD and methodology teams to customize and integration the VIPs in your environment.

    Front-End Design and Verification Services


    Architecture design, RTL Design, Chip Integration, Testbench Creation, Testplan and Test vector coding, Assertions, SVA, Functional Coverage, Verilog, VHDL, System Verilog with OVM/ UVM/ VMM, IP Verification, SOC Verification, Functional and Timing Simulations, Power Aware simulations, CPF/ UPF based verification

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