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R807 High-performance 32-bit processor for real-time control

Overview

R807 utilizes an 8-stage pipeline and dual-issue out-of-order architecture. In addition to the cache, it implements tightly-coupled memory (TCM), a low-latency peripheral quick access interface, rapid interrupt response and memory ECC check. It is suitable for application fields requiring high real-time performance and reliability, such as SSD s and industrial control.

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