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All Silicon IP

Overview

U54-MC Coreplex IP is the world’s first RISC-V based 64-bit quad-core application processor, supporting full-featured operating systems such as Linux. The U54-MC Coreplex’s high-performance and flexible memory system makes it ideal for applications such as AI, machine learning, networking, gateways, and smart IoT devices.

Applications

The U54-MC Coreplex’s high-performance and flexible memory system makes it ideal for applications such as AI, machine learning, networking, gateways, and smart IoT devices.

Block Diagram

Features

  • Fully compliant with the RISC-V ISA specification
  • 4x RV64GC U54 Application Cores:
    • 32KB L1 I-cache with ECC
    • 32KB L1 D-cache with ECC
    • 8 Region Physical Memory Protection
    • 48 Local Interrupts per core
    • Sv39 Virtual Memory support with 38 Physical Address bits
  • 1x RV64IMAC E51 Monitor Core:
    • 4KB L1 I-Cache with ECC
    • 8KB DTIM with ECC
    • 8 Region Physical Memory Protection
    • 48 Local Interrupts
  • Fully Coherent TileLink Bus
  • Integrated 2MB L2 Cache with ECC
  • Real-time capabilities:
    • Both the L1 Instruction Cache and the L2 Cache can be configured into high speed deterministic SRAMs
  • CLINT for multi-core timer and software interrupts
  • PLIC with support for up to 511 interrupts with 7 priority levels
  • Debug with instruction trace
  • U54 Performance:
    • 1.7 DMIPS/MHz
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