Find Top SoC Solutions
for AI, Automotive, IoT, Security, Audio & Video...
You are here : design-reuse-embedded.com  > FDSOI IP  > Interface Controller & PHY->PCI Serdes - PHY  > PCI Serdes - PHY

PCI Express GEN-3/SATA3 SERDES PHY - Samsung 28 28FDSOI


Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protocol market needs including a wide range of ac- coupled high-speed serial communication standards requiring serial Clock Data Recovery (CDR). The pin-configurable macro uses standard logic process devices, and exhibits exceptional input sensitivity, input jitter tolerance and low output jitter. Analog Bits proprietary and industry leading PLL technology in combination with sophisticated circuit techniques and innovative IO design makes this macro an extremely area and power efficient solution. The PMA can be integrated with the available PCS to provide a PCI-Express Gen1/Gen2 PHY solution, and has interface capability to allow integration with other customer-designed serial protocol PCS layers.

Partner with us

List your Products

Suppliers, list and add your products for free.

More about D&R Privacy Policy

© 2021 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.