The VC-2 LD (Low Delay) Codec is ideally suited for ultra-low latency video transmission. The low complexity of the algorithm allows cost-effective compression of the video stream. A typical use case of the VC-2 LD codec is the reduction of the bandwidth required to transport HD, 4K and high frame rate video signals. The VC-2 Low Delay compression algorithm is a simple wavelet-based intra-frame codec. The algorithm is described in the SMPTE 2042 standard, VC-2 Video Compression .

The algorithm is especially designed to achieve low latency. Due to its low complexity, the VC-2 LD encoder and decoder do not require any external memory. The resource usage being very low, it can be easily integrated in existing designs and low-end Altera and Xilinx FPGA s.