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You are here : design-reuse-embedded.com  > RISC-V  > RISC-V Platform

RISC-V-based SoC template

Overview

IOb-SoC is a RISC-V SoC template written in Verilog, which users can download for free, modify, simulate and implement in FPGA or ASIC. It supports stand-alone and booting modes, and can use internal RAM or an external DDR controller via L1/L2 cache systems.

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