www.design-reuse-embedded.com
SEARCH SOLUTIONS   
    • Categories
    • RISC-V
    • Embedded Processing
    • 5G, 3GPP LTE SoCs
    • IoT SoCs
    • Artificial Intelligence SoCs
    • Automotive SoCs
    • Space and Avionics
    • Security Solutions & SoCs
    • Audio & Video SoCs
    • Design Platforms
    • Monitoring and Verification
    • SoC Design Services
    • Find your best SoC design partner
Partner Videos D&R Events
    • IP-SoC Days 2024
    • IP-SoC Days 2023
    • IP-SoC Days 2022
    • IP-SoC Days 2021
    • IP-SoC Days 2020
    • IP-SoC 2023
    • IP-SoC 2022
    • IP-SoC 2021
    • IP-SoC 2020
On Demand Webinars NEWS
Find Top SoC Solutions
for AI, Automotive, IoT, Security, Audio & Video...
You are here : design-reuse-embedded.com  > Security Solutions  > Security Platform

Device Secure Debug

Overview

The Joint Test Action Group (JTAG) is the IEEE1149.1 Standard Test Access Port (TAP) and Boundary Scan Architecture.
Giving a full access to the internal system components of the device, the TAP interface can be a backdoor for hackers.
Secure-IC offers a set of tools to secure the access to the device. This solution can be deployed in the Securyzr iSE or as a standalone IP.

Partner with us

Contact Us
Partnership Offers

List your Products

Suppliers, list and add your products for free.

List your Products

More about D&R Privacy Policy

© 2024 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.