IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec core enhances secure communication at layer three (Network) of the OSI model, ensuring the authenticity and confidentiality of data traffic. It leverages the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with a 256-bit key length, for Encapsulating Security Payload (ESP) frame processing within the IPsec protocol.

Xiphera's scalable extreme-speed IPsec IP core is tailored for high-bandwidth applications, ranging from 10 Gbps to 200 Gbps links. Designed for seamless integration, our IP core supports a vendor-agnostic design methodology, making it adaptable across various high-end FPGA or ASIC environments.

Rapid ESP packet encryption/decryption
Packet processing performed in five different modes: authentication and encryption with or without Initialisation Vector, or passing payload as it is.

IPsec implementation can be adapted with enhancements and optimisations, based on customer requirements and the selected hardware architecture.