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You are here : design-reuse-embedded.com  > Security Solutions  > Security IP

FireCode FEC Error correction bust error correction FEC

Overview

Zero latency, asynchronous, low power , low gate count FireCode FEC.


It detects and corrects 11 bits of burst errors in 2112 bits of received codeword.


Encoding and decoding is performed in 0 clock cycles.


RTL has logic for


Encoder

  • 32 bit asynchronous CRC calculator on 2080 message bits


Decoder

  • 11-bit asynchronous CRC calculator on 2112 bits of received codeword

  • 21-bit asynchronous CRC calculator on 2112 bits of received codeword

  • 11 bit search engine to detect bit 0 of 11 bits where error was introduced.

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