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Mobiveil Generic RapidIO (GRIO) controller is a highly flexible and configurable IP to provide RapidIO interface on one side and a generic interface on the system side. The Mobiveil Generic RapidIO Controller Solution can be used as a Host or device. The controller architecture is carefully tailored to optimize link utilization, latency, reliability, power consumption, and silicon footprint. Mobiveil Generic RapidIO Controller design is fully synchronous and adheres to standard synthesis, test insertion and physical design practices. The solution allows licensees to easily migrate among COT, FPGA, Gate array, structured ASIC and Standard cell technologies. The IP with its flexible user logic interface can be easily integrated into a wide range of applications.

Block Diagram


  • Compliant to RapidIO specifications revision 3.1
  • Compliant with RapidIO Error Management Extension specification, Revision 3.1
  • Implements Logical, Transport and Physical layers functions
  • Architected for high transmit buffering scheme
  • Implements receiver controlled flox control
  • Provides Packet oriented user logic interface

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