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MES - Managed Ethernet Switch IP Core

Overview

Managed Ethernet Switch (MES) IP core features a non-blocking crossbar matrix that allows continuous transfers between all the ports. It implements a Store & Forward switching approach that fulfills Ethernet standard policy regarding frame integrity checking. The switch buffers and verifies each frame before forwarding it. Nevertheless, the latency time has been minimized to nanoseconds order. Consequently, MES is the perfect switch to implement Ethernet based Industrial Networks.


MES is a tri-speed (10/100/1000 Mpbs) switch IP and supports IEEE 1588 V2 Transparent Clock functionalities. This features modifies PTP event messages taking into account the time spent crossing the switch. This scheme improves distribution accuracy by compensating delivery variability across the network.


Furthermore, MES also supports IEEE 1588 V2 One Step Transparent Clock Peer-to-Peer (P2P) functionality by using independent hardware for each port. This feature allows compensating the residence time but also the delay of each link.


MES can be used in combination with SoC-e HSR-PRP Switch IP to introduce HSR and PRP capabilities in the ports that are required. HSR switching approach is Cut Through. Thus, the combination offers the maximum performance and maximum compatibility with the standards. It provides MII/GMII/RGMII native interfaces for Ethernet PHY devices and it can be combined with Xilinx IP to support RMII or SGMII among other interfaces. It also supports and AXI4-Stream interface to be connected to other IP Cores that do not feature MAC based interfaces.

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