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Camera Front-End Processor Core

All Silicon IP

Overview

The CAMFE Core implements a flexible, resource-efficient camera front-end processor that receives raw pixel data from a CMOS or CCD sensor and outputs a video stream ready for display, further processing, or compression. The core first converts the Bayer pattern output from the sensor to an RGB image using an efficient de-mosaicing interpolation filter. The interpolated RGB samples are input to the White Balancing stage, which adjusts color intensities so they are appropriate for reproduction in a display. Under its full configuration, the core subsequently proceeds with further steps essential for optimizing the visual quality of the image, running RGB to YUV color space conversion, then performing Contrast Stretching (also called Normalization) and Gamma Correction, and finally applying a Sharpening Filter. The CAMFE Core requires only a few lines of buffering and adds minimal processing latency. It features extremely low power consumption due to the absence of a power-consuming frame buffer and the core s small silicon footprint (less than 15,000 gates). Furthermore, a fine-pipelined structure allows CAMFE to operate at high clock frequencies, and it can process over 150 Mpixels/sec even in low-end FPGAs. The core is designed with industry best practices, and its reliability and low risk have been proven through both rigorous verification and customer production. Its deliverables include a complete verification environment and a bit-accurate software model.

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