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GUC HBM2 IP is a complete solution for SoC design targeting high bandwidth applications such as AI, HPC, data centers and networking. GUC HBM2 IP is fully compliant to JEDEC HBM2 memory interface spec. With fully optimized hardmacro PHY and manufactured on TSMC process technologies, GUC HBM2 PHY is currently silicon proven at up to 2.4 Gbps, making it the industry highest performance HBM2 PHY. Along with the eye-catching performance, GUC HBM2 PHY has the most optimal power/area trade off among all HBM2 IP vendors.

GUC provides HBM2 IP for a wide range of advanced process nodes including 16nm, 12nm and 7nm. Essential to HBM2 IP solution, GUC is expert in TSMC HBM CoWoS flow, implementation and testing. GUC HBM2 IP has been proven in testchips and 2.5D IC packaging with dual sourcing (Samsung and Hynix).

Block Diagram


  • High Bandwidth Memory (HBM) DRAM controller, compliant with JESD235B
  • Support pseudo channel mode with 64DQ per pseudo channel
  • Support AXI 4.0 port
  • Support DFI 1:1 (DFI 1:2 is supported through a wrapper) for HBM2
  • Support DFI 1:2 for HBM2E
  • Support BL4
  • Support DQ/AC bus parity
  • Support DBI, DM, and ECC
  • Support single bank refresh
  • Support self-refresh
  • Support programmable mapping from AXI address to bank group, bank, row, and column
  • Support AXI read interleaving
  • Support QoS
  • Support BIST

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