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141 "Cryptography" SoCs

1
3DES-ECB 1 Billion trace DPA resistant cryptographic accelerator core
Rambus Crypto Accelerator 3DES-ECB Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consumpti...

2
AES (ECB), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores
Rambus Crypto Accelerator AES-AE-Fast Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consum...

3
AES (ECB-CBC-CFB-CTR), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores
Rambus DPA Resistant AES-FBC Cryptographic Accelerator Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the powe...

4
AES CCM/GCM Engine
The EIP-39 AES Accelerators implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O reg...

5
AES Engine
The EIP-36 AES Engines implement the Advanced Encryption Standard (AES) algorithm, as specified in Federal Information Processing Standard (FIPS) Publication 197. The accelerators include I/O register...

6
AES GCM/XTS Engine
The EIP-38 - AES/GCM/XTS/LRW Engines are specifically suited for next generation processors deployed in networking and storage appliances that need to support combinations of AES (with its regular fee...

7
ARC4 Engine
The EIP-44 is the IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec).

8
ARIA Engine
The EIP-11 ARIA algorithm, as specified in RFC 5794. The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling and GHASH. Besides the...

9
Camellia Engine
The Camellia Engine implements the Camellia crypto algorithm, as specified in Specification of Camellia and RFC3713.

10
ChaCha20 Engine
The EIP-13 ChaCha engine implements the ChaCha20 algorithm, as specified by [ChaCha]. The accelerators include I/O registers and an encryption/decryption core. Designed for fast integration, low gate ...

11
Circuit Camouflage Technology
Rambus Circuit Camouflage Technology (formerly Inside Secure), also known as SecureMedia Library (SML), is an anti-reverse engineering and anti-cloning protection for integrated circuits that has both...

12
Code Protection: Instilling trust into your applications
Inside Secure s Code Protection technology provides powerful automated software protection tools applicable across Mobile, IoT, Desktop and Server platforms.

13
CryptoFirewall Cores
Providing superior security and tamper resistance, while being highly-cost effective. Our cores complement existing security implementations, and are ideal for preventing counterfeiting in a broad number of applications.

14
Cryptographic Accelerator Core SHA-2-Compact
Rambus Crypto Accelerator SHA-2-Compact Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power cons...

15
Cryptographic Accelerator Core SHA-2-Full
Rambus Crypto Accelerator SHA-2-Full Hardware Cores offload compute intensive cryptographic algorithms in SoC s CPU at 100x performance (when run at identical frequencies) and 10% of the power consump...

16
Cryptography IP solutions, Public Key Accelerators (PKAs) and True Random Number Generators (TRNGs)

Synopsys offers a broad portfolio of silicon-proven DesignWare® Cryptography IP solutions that includes symmetric and hash cryptographic engines, Public Key Accelerators (PKAs) and True Random ...


17
CryptoManager Root of Trust - CryptoManager RISC-V Root of Trust Programmable Secure Processing Core
The CryptoManager Root of Trust is a fully-programmable hardware security core that protects against a wide range of attacks with state-of-the-art anti-tamper and security techniques to offer vendors security by design.

18
CryptoManager Security Engine
CryptoManager Security Engine is an in-device root-of-trust offered as an embedded hardware core, or as a software agent that can be implemented as a protected element in a trusted OS or directly in the high-level device OS for the secure provisioning of keys and features throughout the device lifecycle. This provides flexible implementation options and allows the CryptoManager Infrastructure to securely communicate with the device to provision keys and manage feature configurations in the supply chain and downstream ecosystems.

19
CryptoManager Security Platform
From chip management to device personalization to downstream feature provisioning, the CryptoManager security platform creates a trusted path from the SoC manufacturing supply chain to downstream service providers with a complete silicon-to-cloud security solution.

20
CryptoManager Trusted Services Security Solutions
The Rambus CryptoManager Trusted Services support a variety of root of trust configurations via a hardware core or secure software, providing a scalable and flexible security solution. Our solutions s...

21
DPA & Fault Injection Resistant AES-AE Cryptographic Core
Rambus DPA & Fault Injection Resistant AES-AE Cryptographic Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. AES-AE 1 Billion...

22
DPA & Fault Injection Resistant AES-ECB Cryptographic Core
Rambus DPA & Fault Injection Resistant AES-ECB Cryptographic Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. AES-ECB 1 billi...

23
DPA Countermeasures
Our Cryptography Research division discovered Simple Power Analysis (SPA) and Differential Power Analysis (DPA), and developed fundamental solutions and techniques for protecting devices against DPA and related side-channel attacks, along with supporting tools, programs, and services.

24
DPA Resistant Cryptographic Accelerator Core 3DES-ECB
Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. 3DES-ECB 1 Billion trace DPA resistant cryptog...

25
DPA Resistant Cores
The DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC. These superior performance cores are easy to integrate into SoCs and FPGAs, providing robust side-channel resistance across different security and performance levels.

26
DPA Resistant Cryptographic Accelerator Core
Rambus DPA Resistant PKEv2, PKEv3, PKEv4 Cryptographic Accelerator Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA.

27
DPA Resistant Cryptographic Accelerator Core ChaCha20 - Small
Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. ChaCha20 Small DPA resistant cryptographic acc...

28
DPA Resistant Cryptographic Accelerator Core RBG (NRBG+DRBG)
Rambus DPA Resistant Cryptographic Accelerator Core RBG (NRBG+DRBG) prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. RBG DPA resist...

29
DPA Resistant Software Library
Addressing the growing demand for readily available solutions that implement Differential Power Analysis (DPA) countermeasures, we developed a family of cryptographic cores and software libraries that...

30
ECC Core
Rambus Error Correction Coding (ECC) Core implements the standard Hamming Code based DRAM Single Error Correction (SEC) and Double Error Detection (DED) algorithm. This algorithm generates an 8 bit EC...

31
FIPS Security Toolkit for OpenSSL
The Rambus FIPS Security Toolkit (formerly from Inside Secure) is a complete cryptographic security solution for IoT providing the tools required to secure your devices and applications. It allows sys...

32
High-performance AES-GCM accelerator - optional SCA protection
The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards and Technology (NIST) in 2001. Galois Counter Mod...

33
High-performance AES-XTS accelerator - optional SCA protection
The Advanced Encryption Standard (AES) is a specification for the encryption of electronic data established by the U.S National Institute of Standards and Technology (NIST) in 2001. It is included in ...

34
HMAC Engine
The EIP-59 is the IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-...

35
In-line Multi-Protocol Engine
The EIP-96 is an Inline Cryptographic Accelerator designed to accelerate and offload the very CPU intensive IPsec, MACsec, SRTP, SSL, TLS and DTLS protocol operations. The In-line Multi-Protocol Engin...

36
KASUMI Engine
As part of Rambus award-winning silicon Intellectual Property (IP) product portfolio, the EIP-06 KASUMI Engine implement the Specification of the 3GPP Confidentiality and Integrity Algorithms as spec...

37
Low-power HMAC SHA AES Crypto Engine
The EIP-120 is a low-power low-gatecount crypto core with DMA capability and local key storage. Compared to a software only solution, the core provides higher performances and additional security to a...

38
Memory (SRAM, DDR, NVM) encryption solution
Memory protection against reverse engineering and tampering Protecting raw memory content from malevolent access Memory protection from the beginning it is written Available with zero latency or high...

39
New Integrity and Data Encryption (IDE) Security IP Module for PCIe 5.0

PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers to their use in consumer electronics. PCI Expres...


40
Poly1305 Engine
The EIP-53 Poly engine is an efficient hardware implementation of the Poly1305 algorithm, as specified by the Internet Research Task Force (IRTF), RFC7539 standard, and for use in TLS1.3(Draft). The a...

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